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Entry  Wed Apr 16 03:22:43 2014, Wang , why is the first channel output error?  QQ??20140416090124.jpg
    Reply  Wed Apr 16 08:30:32 2014, Stefan Ritt, why is the first channel output error?  
Message ID: 336     Entry time: Wed Apr 16 03:22:43 2014     Reply to this: 338
Author: Wang  
Subject: why is the first channel output error?  

 Hi,

 The diagram below is DRS4 output. Green is the output8+, blue is the output8-. Output8+ of the first channel is below  the baseline. It is not  right.

Others channel  is suitable. I check the circuit , Hardware is no problem, so I want to konw where the FPGA code  is wrong. what reason is caused? Thanks!

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