DRS4 Forum
  DRS4 Discussion Forum, Page 1 of 15  Not logged in ELOG logo
New entries since:Thu Jan 1 01:00:00 1970
   +  Reply  Thu Feb 22 10:37:03 2024, Stefan Ritt, Simulation of FPGA 
   +  Reply  Wed Oct 25 19:52:33 2023, John Westmoreland, WaveDREAM Design 
   +  Reply  Wed Sep 13 13:18:45 2023, Stefan Ritt, Input range switch added in Version 2.1.3 
   +  Reply  Mon Jun 12 14:22:04 2023, Stefan Ritt, Different sampling rates in multi-board configuration 
   +  Reply  Mon Feb 6 13:28:28 2023, Stefan Ritt, DRS4 installation via tar in ubuntu not working 
   +  Reply  Mon Oct 24 12:50:24 2022, Stefan Ritt, Channel Cascading Option in the 2048-bin 
   +  Reply  Tue Sep 27 15:20:55 2022, Stefan Ritt, Required Firmware for DRS4 Evaluation Board Version 2.0 
Entry  Wed Sep 7 10:13:41 2022, Prajjalak Chattopadhyay, Register status after reset 
   +  Reply  Fri Jul 29 17:23:43 2022, Stefan Ritt, Spikes/noise sensitive to clock settings? 
   +  Reply  Fri Jul 29 14:09:35 2022, Stefan Ritt, Increase event rate, use ROI mode, and install sw from source in Mac 
   +  Reply  Thu Jun 16 05:31:25 2022, LynseyShun,  
   +  Reply  Tue Mar 15 13:07:50 2022, Matias Senger, Time calibration and the C++ API 
   +  Reply  Tue Mar 8 12:20:00 2022, Matias Senger, Why does not trigger at higher sampling frequencies? 
   +  Reply  Mon Mar 7 16:37:54 2022, Stefan Ritt, Scaler issue to evaluate live time  Screenshot_2022-03-07_at_16.37.32_.pngScreenshot_2022-03-07_at_16.35.44_.png
Entry  Mon Mar 7 13:38:03 2022, Radoslaw Marcinkowski, Problems with DRS4 Evaluation Board after Windows 10 upgrade - share of experiences  
   +  Reply  Thu Mar 3 13:47:26 2022, Stefan Ritt, How to convert samples to volt? 
Entry  Wed Feb 16 14:06:45 2022, Dmitry Hits, Sliders missing in drsosc Screen_Shot_2022-02-14_at_14.17.30.png
   +  Reply  Tue Feb 15 12:02:29 2022, Stefan Ritt, Cannot trigger on pulses, have to trigger on undershoot 
Entry  Tue Feb 15 11:59:22 2022, Alex Myczko, apt install drs4eb 
   +  Reply  Wed Jan 26 06:44:11 2022, student_riku, I want to know about the readout 
ELOG V3.1.5-fe60aaf