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ID Date Author Subject Text Attachments
  217   Wed Feb 13 16:58:40 2013 Martin PetriskaNonuniform sampling Are there any plans to include reconstruction
of nonuniform sampling  in DRS4 to get
uniformly sampled data?
  
  216   Tue Feb 5 14:38:35 2013 Stefan Rittvariation of sampling capacitors

    

       
            
  
  215   Fri Feb 1 17:43:48 2013 Jinhong Wangvariation of sampling capacitors

    

       
            
  
  214   Thu Dec 27 18:15:14 2012 Jinhong Wangvariation of sampling capacitors

    

       
            
  
  213   Thu Dec 27 09:49:17 2012 Stefan Rittvariation of sampling capacitors

    

       
            
  
  212   Thu Dec 27 00:12:12 2012 Jinhong Wangvariation of sampling capacitorsHi Stefan,
A quick question, what is the typical
variation of the sampling capacitors in DRS4?
  
  211   Fri Dec 14 21:49:29 2012 Stefan RittEVM rev4 board trigger change and drs_example

    

       
            
  
  210   Fri Dec 14 10:07:54 2012 EvgeniDRS-4 trigger 

    
  
  209   Fri Dec 14 10:07:14 2012 EvgeniDRS-4 trigger 

    
  
  208   Fri Dec 14 08:42:53 2012 Stefan RittDRS-4 trigger

    

       
            
 DRSOsc.png 
  207   Thu Dec 13 19:49:47 2012 EvgeniDRS-4 trigger 

    
  
  206   Thu Dec 13 12:14:35 2012 Stefan RittDRS-4 trigger

    

       
            
  
  205   Thu Dec 13 12:03:29 2012 EvgeniDRS-4 triggerHow to configure DRS oscilloscope for the
oscillations with an amplitude greater than
the value of the exposed
  
  204   Thu Dec 6 09:23:36 2012 Martin PetriskaEVM rev4 board trigger change and drs_example I switched from rev 3 to rev 4 board,
but have some problems with triggering, board
is now waiting for trigger (rev.3 is working).
  
  203   Tue Dec 4 09:55:43 2012 Stefan RittQuestion of drs4 using

    

       
            
  
  202   Tue Dec 4 09:50:11 2012 Zhongwei DuQuestion of drs4 using

    

       
            
  
  201   Tue Dec 4 09:39:44 2012 Stefan RittQuestion of drs4 using

    

       
            
  
  200   Tue Dec 4 09:24:22 2012 Zhongwei DuQuestion of drs4 usingWhen Denable and Dwrite is high , the voltage
of PLLOUT is 0 V.  And  the Dtap
is turn high with no delay when the Denable
  
  199   Mon Dec 3 11:40:35 2012 Gyuhee KimAnother question about using multi boards.

    

       
            
  
  198   Mon Dec 3 09:18:09 2012 Stefan RittAnother question about using multi boards.

    

       
            
  
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