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ID Date Authordown Subject
  761   Sat Jul 13 01:00:15 2019 Brendan PosehnEvaluation Board Test Functionality

Hello, 

I have recently obtained a DRS4 Evaluation Board (V5), but I am unable to register signals when using the DRS Oscilloscope application. There seems to be some difference in noise when I have an input connected to a signal or not, but I am unable to view a simple, 0.2V amplitude square wave or other small signals. The only way I have been able to view a waveform is when connecting the reference clock to all channels. When running 'info' in the DRS Command Line Interface I am shown correct information. I was wondering if there is any way for me to test the functionality of the board (specifially ability to read signals on Ch 1-4) to ensure that it is indeed working as expected? 

Thanks, 

Brendan

  763   Mon Jul 15 19:34:25 2019 Brendan PosehnEvaluation Board Test Functionality

Hello Stefan, 

Thanks for the quick reply. The issue was a faulty SMA connector, should have checked this first. Signal looks good now.

Thanks for your time, 

Brendan

Stefan Ritt wrote:

Have you set the trigger correctly to the channel with your signal, polarity and level? Do you undersand the difference between normal and auto trigger? Why don't you post a screendump. Are you ABSOLUTELY SURE that you have a signal on your cable? Have you tried with another oscilloscope? Are you sure that your SMA connector is good?

Stefan

 

Brendan Posehn wrote:

Hello, 

I have recently obtained a DRS4 Evaluation Board (V5), but I am unable to register signals when using the DRS Oscilloscope application. There seems to be some difference in noise when I have an input connected to a signal or not, but I am unable to view a simple, 0.2V amplitude square wave or other small signals. The only way I have been able to view a waveform is when connecting the reference clock to all channels. When running 'info' in the DRS Command Line Interface I am shown correct information. I was wondering if there is any way for me to test the functionality of the board (specifially ability to read signals on Ch 1-4) to ensure that it is indeed working as expected? 

Thanks, 

Brendan

 

 

  117   Thu Apr 14 18:23:53 2011 Bob HiroskyFixes to DOScreen.cpp for recent built on linux
Hello,

I was just building version 3.1.0 and ran into some problems in DOScreen.cpp.  Basically the conversions from
char* to wxString were generating "ambiguous overload" errors (in gcc 4.4.3, wx-2.8)

The simple fix is given in  the following diff output.

Cheers,

Bob

diff drs-3.1.0_o/src/DOScreen.cpp drs-3.1.0/src
237c237
<      wxst = wxString(m_frame->GetOsci()->GetDebugMsg(),wxConvUTF8);  //BH
---
>       wxst = m_frame->GetOsci()->GetDebugMsg();
246c246
<       wxst = wxString(m_debugMsg,wxConvUTF8);  //BH
---
>       wxst = m_debugMsg;
477c477
<     wxst = wxString("AUTO",wxConvUTF8); //BH
---
>          wxst = "AUTO";
479c479
<     wxst = wxString("TRIG?",wxConvUTF8);  //BH
---
>          wxst = "TRIG?";
 
  237   Thu Apr 11 22:41:13 2013 Bill Ashmanskascode/details for optimal DRS4 timing calibration?

Hi Stefan,

Is either some example code or a detailed written description available for the improved DRS4 timing-calibration algorithm described by Daniel Stricker-Shaver at MIC 2012?  I think you told me that you had verified the results with your own test set-up, so I figure there must be at least two sets of code in existence to implement this calibration.  (I have Daniel's presentation slides.)

I managed to find a ping-pong distribution of cell widths that looks quite similar to that shown in Daniel's slides, using an algorithm similar to the technique one uses to find radial offsets in a tracking chamber (i.e. using residuals weighted by track slope), but I'd rather use the method with which you and Daniel have already found good results.  (The attached graph shows in black the histogram of cell widths for essentially the algorithm used in DRS.cpp/DRSBoard::AnalyzeWF, and in blue the histogram of cell widths extracted from the slope-weighted residuals for a periodic reference signal.)

By the way, since Daniel finds a FWHM coincidence-timing resolution around 20-25ps at 5 GSPS (for perfectly identical pulses), should I expect a FWHM resolution (for synthesized, ideal pulses) of around 50-65ps at 2 GSPS?

(I'm posting here instead of writing you both privately because I figure there may be broader interest in Daniel's algorithm.)

-Bill

 

  768   Mon Aug 19 23:01:22 2019 Bill Ashmanskasshould one deassert DENABLE while writing the write-shift register?

Hi Stefan,

We have for some time now been using custom firmware on a custom board to read waveforms out of DRS4 chips.  Now we are working on cascaded readout mode, 4 channels @ 2048 samples, WSREG=0x55, in order to allow for longer trigger latency.

Doing a testbench simulation of the FPGA code raised a question for me:  Do I need to deassert DENABLE while I shift a new 8-bit value into the write-shift register?  What happens if, during the few-hundred nanoseconds it takes to shift 8 bits into the register, the domino wave crosses cell 768, thereby shifting the write-shift register left by one bit?  Is this shifting suppressed when A=0b1101?  Or does the update of the actual write-shift register occur only once, after the 8th SRCLK cycle?  (Maybe one is really shifting bits into a shadow register that is copied all at once into the actual register?)

I notice in simulating your drs4_eval5_app.vhd that if one sets bit 27 ("drs_ctl_dactive") of register 0 (do not deassert DENABLE on trigger), then starts the domino wave (set bit 0 of register 0), then issues a software trigger, then later writes to register 5 (config register, wsreg, etc.), DENABLE is not in fact deasserted during the time when A=0b1100 (conf_setup, conf_strobe) or when A=0b1101 (wsr_setup, wsr_strobe).

But my simulation testbench includes a simplified Verilog model of my interpretation of the DRS4 data sheet, and my simulated DRS4 happened to cause the write-shift register to shift (256 samples before DTAP toggled) during your "wsr_strobe" FSM state, thus corrupting the value that was being shifted into the WSREG via SRIN and SRCLK.

So I'm curious:  to be safe, should one deassert DENABLE before updating the write-shift register, or is it safe to update it even while the domino wave is active and looping?  It seems easy enough to be safe, since we should only need to write to the WSREG once during the setup phase and then let it loop forever.

Many thanks,

Bill

 

 

  770   Tue Aug 20 16:05:21 2019 Bill Ashmanskasshould one deassert DENABLE while writing the write-shift register?

Aha -- many thanks.  I think what tripped up my test logic is that the "done" state in drs4_eval5_app.vhd that executes post-readout sets DWRITE back to 1 (drs_write_set).  If one then writes to FPGA register 5 while the FSM is in the "idle" state, the conf_strobe and wsr_strobe states occur with DWRITE and DENABLE both asserted.  This is if one sets the "dactive" bit in the FPGA app code, which is probably not the usual use case.  Maybe using the real DRS.cpp avoids this situation.  (I was simulating your FPGA code to test my understanding of what our FPGA code should do.)

Anyway, our own use case is fine: as you suggest, we leave DENABLE asserted, but we deassert DWRITE while reading out or while changing DRS4 register values.

Thanks again,

Bill

 

 

Stefan Ritt wrote:

Hi Bill,

you keep DENABLE active all the time to keep the Domino Wave running, but you deassert DWRITE if you change any register via SRCLK. There is no shadow register, just a simple shift register, but with DWRITE being low, the domino circuitry does not touch it.

Best,
Stefan

Bill Ashmanskas wrote:

Hi Stefan,

We have for some time now been using custom firmware on a custom board to read waveforms out of DRS4 chips.  Now we are working on cascaded readout mode, 4 channels @ 2048 samples, WSREG=0x55, in order to allow for longer trigger latency.

Doing a testbench simulation of the FPGA code raised a question for me:  Do I need to deassert DENABLE while I shift a new 8-bit value into the write-shift register?  What happens if, during the few-hundred nanoseconds it takes to shift 8 bits into the register, the domino wave crosses cell 768, thereby shifting the write-shift register left by one bit?  Is this shifting suppressed when A=0b1101?  Or does the update of the actual write-shift register occur only once, after the 8th SRCLK cycle?  (Maybe one is really shifting bits into a shadow register that is copied all at once into the actual register?)

I notice in simulating your drs4_eval5_app.vhd that if one sets bit 27 ("drs_ctl_dactive") of register 0 (do not deassert DENABLE on trigger), then starts the domino wave (set bit 0 of register 0), then issues a software trigger, then later writes to register 5 (config register, wsreg, etc.), DENABLE is not in fact deasserted during the time when A=0b1100 (conf_setup, conf_strobe) or when A=0b1101 (wsr_setup, wsr_strobe).

But my simulation testbench includes a simplified Verilog model of my interpretation of the DRS4 data sheet, and my simulated DRS4 happened to cause the write-shift register to shift (256 samples before DTAP toggled) during your "wsr_strobe" FSM state, thus corrupting the value that was being shifted into the WSREG via SRIN and SRCLK.

So I'm curious:  to be safe, should one deassert DENABLE before updating the write-shift register, or is it safe to update it even while the domino wave is active and looping?  It seems easy enough to be safe, since we should only need to write to the WSREG once during the setup phase and then let it loop forever.

Many thanks,

Bill

 

  241   Mon Apr 22 15:33:28 2013 Benjamin LeGeyteffect of jitter/alignment between SRCLK and ADC clock

Hello!
let me apologize in advance if this has already been covered somewhere and I missed it. 


I have a question about a statement made regarding the ADC clock in the evaluation board v4.0 manual.  At the bottom or page 23 there is a mention of jitter between the SRCLK signal and the ADC clock causing a baseline variation in the sampled output of up to a few mV.  Is there any more information out there about this?  I find this confusing for the following reason: If the DRS output has mostly settled after 28ns and the signal that is being sampled is a DC signal, I don't understand why an aperture jitter in the sampling ADC should cause a voltage error in the measured signal.  I already know about the possibility of noise spikes every 32 samples if these clocks are not properly aligned, though I don't know the origin of those spikes.  are these two things related?

 

Many Thanks!
 

  346   Fri May 16 14:04:47 2014 Benjamin LeGeytsimultaneous writing and reading with region of interest mode?

Hello!

We're developing electronics based on the DRS4 to read out a breast PET scanner and our event rate will be quite high so we're concerned about dead-time.  with that in mind, I have a question regarding the mode of simultaneous writing and reading that is described in the DRS4 data sheet.  I think the description there is quite clear but I'd like to ask for a few clarifications.

1) Are the channels required to be read out via the channel multiplexer when doing the simultaneous write/read or is it ok to read out all channels in parallel (even the ones still sampling) and just throw away the ones you don't want?

2) If one wanted to use region of interest mode along with the simultaneous write/read, how would that work?  Here is what I would think - please tell me if I'm missing some important detail:

-upon trigger, deassert dwrite.

-strobe RSRLOAD

-increment write config register

-reassert dwrite

-start the readout (reading out stop shift register value on SROUT as data comes out)

3) now to add even more complexity - I would actually like to use simultaneous write/read along with region of interest mode and also with pairs of cascaded channels as we need >500ns latency and 2Gsps is too slow for our signals.  the combination of cascading and simultaneous write/read is addressed in the data sheet but I still have one question.  In normal circumstances when cascading channels, one would read out the value in the write shift register to know which channel was active when the domino wave stopped.  I assume that this is not possible when dwrite is enabled as the write shift register is then advanced by the domino wave, so I see three possibilities:

-accept more dead-time and read out the write-shift-register each time (adds ~240ns to deadtime)

-just read out both channels every time and figure out later where is the data you want

-attempt to keep track of the expected state of write-shift-register in firmware.

is there a better option that I have not thought of?

 

many thanks!

Benjamin LeGeyt

  132   Sat Oct 15 04:45:25 2011 Aurelien BouvierDRS4 eval board: readout rate

Hi,

Our setup uses a DRS4 evaluation board (version 2.0).

Although we trigger the board at a rate of ~4kHz (on channel2), readout through USB2 is only happening at a rate of ~125Hz.

After some investigation, we could pin down that it is due to the time it takes to complete the following commands: musb_write() and musb_read() which both take ~150 microsecond to complete. Because they are called multiple times, reading out 1 trigger takes ~8 millisecond which explains the 125Hz we're seeing.

Is ~150 us to complete a musb_read()/musb_write() command expected?

Is there any way we could speed up the readout rate of the DRS4 board so that data acquisition through USB2 is closer to our trigger rate of 4kHz?

Any feedback you might have on this topic would be greatly appreciated.

Many thanks,

Aurelien

  773   Fri Sep 13 15:27:41 2019 Arseny RybnikovScaler / How to modify the firmware to change the scaler integration time

Hello,

We want to use the inner DRS4 counter(scaler) within more than the 100ms integration time. We guess that we need to modify the original firmware around this point:


-- Reference clock used for frequency counter
 
  proc_1hzclk: process(I_RESET, I_CLK33)
  begin
    if (I_RESET = '1') then
      drs_1hz_counter(31 downto 0)          <= (others => '0');
        drs_1hz_clock                         <= '0';
        scaler_reset                          <= (others => '1');
        scaler_ff_reset                       <= (others => '1');
    elsif rising_edge(I_CLK33) then
      drs_1hz_counter                       <= drs_1hz_counter - 1; -- count down
        scaler_reset                          <= (others => '0');
        scaler_ff_reset                       <= (others => '0');
      
      -- toggle refclk if timer expires      
      if (drs_1hz_counter(drs_1hz_counter'high) = '1') then
        drs_1hz_clock                       <= not drs_1hz_clock;
        drs_1hz_counter(31 downto 0)        <= X"0016E35F";     -- 1499999, I_CLK33 is actually a 30 MHz clock
          
          scaler_ff_reset                     <= (others => '1'); -- reset scaler_ff once every 100ms cycle
        loop_scaler_reset : for i in 0 to 5 loop
          if (scaler_ff(i) = '0') then                          -- no activity since last cycle?     
               scaler_reset(i)                <= '1';             -- force clear scaler register
            end if;
        end loop;

          if (scaler_ff(0) = '0') then                            -- no activity since last cycle?     
            scaler_reset(0)                   <= '1';             -- force clear scaler register
          end if;
          
      end if;  
    end if;
  end process;


Could you please tell us how to modify the firmware to increse the time up to 5 seconds for instance?

Thanks in advance, Arseny

  14   Wed Oct 14 23:53:05 2009 Armin KolbDRS_exam using USB Evaluation Board with OS X

For the users using a Macintosh,

after several hours the Evaluation Board is working  on my Macintosh (intel).

1) install the development package with xcode, its on the OS X installation DVD

2) install the libusb binary from http://www.ellert.se/twain-sane/

3) modify the makefile  for compiling drs_exam (attached) afterwards it's running perfect!

 

best,

Armin

 

  294   Mon Sep 23 09:22:52 2013 Andrzej RychterSampling Frequency: DRS4 eval board

Is it possible to set sampling frequency at 100 MHz in DRS4 eval board? Trying to set 0.1GHz in Osci program results in around 0.7 GHz. In drscl.exe i'm able to set freq at 0.1GHz but calibration is impossible.

Thank For Help!

Andrzej Rychter

  296   Mon Sep 23 09:51:48 2013 Andrzej RychterSampling Frequency: DRS4 eval board

Stefan Ritt wrote:

Andrzej Rychter wrote:

Is it possible to set sampling frequency at 100 MHz in DRS4 eval board? Trying to set 0.1GHz in Osci program results in around 0.7 GHz. In drscl.exe i'm able to set freq at 0.1GHz but calibration is impossible.

Thank For Help!

Andrzej Rychter

700 MHz is the minimal sampling frequency. If you need 100 MHz, just buy a "normal" commercial ADC.

 

Best regards,

Stefan 

 OK!

Thanks for fast reply.

Andrzej

  397   Fri Feb 13 10:12:16 2015 Andrzej Grzeszczukdrs4 and root

Hello,

I compiled base file for drs system  (DRS.cpp) to root framework (root.cern.ch) as dynamic library DRS.so. It can be used for building many kind of applications under the root system. I applied it for older version of  root 5.28 and for latest version 6.02 too.

If anyone is interesting, I can help, please write to me andrzej.grzeszczuk@us.edu.pl

Regards

Andrzej

  130   Fri Sep 16 22:06:07 2011 Andriy Zatserklyaniycompilation error for version 4.0.0 on linux

Hi Stefan,

When I compiled DRS4 software version 4.0.0 on Linux (Debian Squeeze) I got this compilation error:

g++ -g -O2 -Wall -Wuninitialized -fno-strict-aliasing -Iinclude -DOS_LINUX -DHAVE_LIBUSB -DUSE_DRS_MUTEX musbstd.o mxml.o strlcpy.o DRS.o ConfigDialog.o DOFrame.o DOScreen.o DRSOsc.o MeasureDialog.o Measurement.o Osci.o InfoDialog.o DisplayDialog.o AboutDialog.o EPThread.o rb.o main.o -o drsosc -lpthread -lutil -lusb -pthread   -lwx_gtk2u_richtext-2.8 -lwx_gtk2u_aui-2.8 -lwx_gtk2u_xrc-2.8 -lwx_gtk2u_qa-2.8 -lwx_gtk2u_html-2.8 -lwx_gtk2u_adv-2.8 -lwx_gtk2u_core-2.8 -lwx_baseu_xml-2.8 -lwx_baseu_net-2.8 -lwx_baseu-2.8
DOFrame.o: In function `DOFrame':
/srv/zatserkl/work/drs4/drs-4.0.0/src/DOFrame.cpp:237: undefined reference to `TriggerDialog::TriggerDialog(wxWindow*)'
/srv/zatserkl/work/drs4/drs-4.0.0/src/DOFrame.cpp:237: undefined reference to `TriggerDialog::TriggerDialog(wxWindow*)'
collect2: ld returned 1 exit status
make: *** [drsosc] Error 1

 

To fix it I added TriggerDialog.o into CPP_OBJ line of the Makefile:

 

CPP_OBJ       = DRS.o ConfigDialog.o DOFrame.o DOScreen.o DRSOsc.o MeasureDialog.o Measurement.o Osci.o InfoDialog.o DisplayDialog.o AboutDialog.o EPThread.o rb.o TriggerDialog.o

 

Best,

Andriy.

  307   Tue Nov 19 04:33:22 2013 Andriy ZatserklyaniyDRSOsc at Mac OS X Mavericks

 I installed Mac OS package on macbook (late 2013). DRSOsc starts to write file but freezes; need to be restarted to restore connection with DRS4 evaluation board (ordered Aug 2011). 

When I ran from the command line, I see these messages:

phone$ /Applications/DRSOsc.app/Contents/MacOS/DRSOsc

2013-11-18 15:11:31.278 DRSOsc[96539:507] CoreText performance note: Client called CTFontCreateWithName() using name "Lucida Grande" and got font with PostScript name "LucidaGrande". For best performance, only use PostScript names when calling this API.

2013-11-18 15:11:31.279 DRSOsc[96539:507] CoreText performance note: Set a breakpoint on CTFontLogSuboptimalRequest to debug.

2013-11-18 15:11:31.281 DRSOsc[96539:507] CoreText performance note: Client called CTFontCreateWithName() using name "Lucida Grande" and got font with PostScript name "LucidaGrande". For best performance, only use PostScript names when calling this API.

2013-11-18 15:11:31.283 DRSOsc[96539:507] CoreText performance note: Client called CTFontCreateWithName() using name "Lucida Grande" and got font with PostScript name "LucidaGrande". For best performance, only use PostScript names when calling this API.

2013-11-18 15:11:31.285 DRSOsc[96539:507] CoreText performance note: Client called CTFontCreateWithName() using name "Lucida Grande" and got font with PostScript name "LucidaGrande". For best performance, only use PostScript names when calling this API.

0 - 0.250

1 - 0.250

2 - 0.250

3 - 0.250

0 - 0.250

1 - 0.250

2 - 0.250

3 - 0.250

2013-11-18 15:11:32.933 DRSOsc[96539:507] CoreText performance note: Client called CTFontCreateWithName() using name "Lucida Grande" and got font with PostScript name "LucidaGrande". For best performance, only use PostScript names when calling this API.

...

...

 

and these:

 

musb_write: requested 10, wrote 0, errno -4 (Unknown error: -4)

musb_read error 0

musb_write: requested 10, wrote 0, errno -4 (Unknown error: -4)

musb_read error 0

...

...

 

I tried to compile Linux package, but got error messages:

 

drs-4.0.1$ make

cc -g -O2 -Wall -Wuninitialized -fno-strict-aliasing -Iinclude -I/opt/local/include -DOS_DARWIN -DHAVE_USB -DHAVE_LIBUSB10 -DUSE_DRS_MUTEX -c src/musbstd.c

cc -g -O2 -Wall -Wuninitialized -fno-strict-aliasing -Iinclude -I/opt/local/include -DOS_DARWIN -DHAVE_USB -DHAVE_LIBUSB10 -DUSE_DRS_MUTEX -c src/mxml.c

In file included from src/mxml.c:79:

include/strlcpy.h:27:14: error: expected parameter declarator

size_t EXPRT strlcpy(char *dst, const char *src, size_t size);

             ^

/usr/include/secure/_string.h:105:44: note: expanded from macro 'strlcpy'

  __builtin___strlcpy_chk (dest, src, len, __darwin_obsz (dest))

                                           ^

/usr/include/secure/_common.h:39:62: note: expanded from macro '__darwin_obsz'

#define __darwin_obsz(object) __builtin_object_size (object, _USE_FORTIFY_LEVEL > 1 ? 1 : 0)

                                                             ^

/usr/include/secure/_common.h:30:32: note: expanded from macro '_USE_FORTIFY_LEVEL'

#    define _USE_FORTIFY_LEVEL 2

                               ^

In file included from src/mxml.c:79:

include/strlcpy.h:27:14: error: expected ')'

/usr/include/secure/_string.h:105:44: note: expanded from macro 'strlcpy'

  __builtin___strlcpy_chk (dest, src, len, __darwin_obsz (dest))

                                           ^

/usr/include/secure/_common.h:39:62: note: expanded from macro '__darwin_obsz'

#define __darwin_obsz(object) __builtin_object_size (object, _USE_FORTIFY_LEVEL > 1 ? 1 : 0)

                                                             ^

/usr/include/secure/_common.h:30:32: note: expanded from macro '_USE_FORTIFY_LEVEL'

#    define _USE_FORTIFY_LEVEL 2

                               ^

include/strlcpy.h:27:14: note: to match this '('

/usr/include/secure/_string.h:105:44: note: expanded from macro 'strlcpy'

  __builtin___strlcpy_chk (dest, src, len, __darwin_obsz (dest))

                                           ^

/usr/include/secure/_common.h:39:53: note: expanded from macro '__darwin_obsz'

#define __darwin_obsz(object) __builtin_object_size (object, _USE_FORTIFY_LEVEL > 1 ? 1 : 0)

                                                    ^

In file included from src/mxml.c:79:

include/strlcpy.h:27:14: warning: type specifier missing, defaults to 'int' [-Wimplicit-int]

size_t EXPRT strlcpy(char *dst, const char *src, size_t size);

             ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

/usr/include/secure/_string.h:105:44: note: expanded from macro 'strlcpy'

  __builtin___strlcpy_chk (dest, src, len, __darwin_obsz (dest))

                                           ^~~~~~~~~~~~~~~~~~~~

/usr/include/secure/_common.h:39:31: note: expanded from macro '__darwin_obsz'

#define __darwin_obsz(object) __builtin_object_size (object, _USE_FORTIFY_LEVEL > 1 ? 1 : 0)

                              ^~~~~~~~~~~~~~~~~~~~~

In file included from src/mxml.c:79:

include/strlcpy.h:27:14: error: conflicting types for '__builtin___strlcpy_chk'

/usr/include/secure/_string.h:105:3: note: expanded from macro 'strlcpy'

  __builtin___strlcpy_chk (dest, src, len, __darwin_obsz (dest))

  ^

include/strlcpy.h:27:14: note: '__builtin___strlcpy_chk' is a builtin with type 'unsigned long (char *, const char *, unsigned long, unsigned long)'

/usr/include/secure/_string.h:105:3: note: expanded from macro 'strlcpy'

  __builtin___strlcpy_chk (dest, src, len, __darwin_obsz (dest))

  ^

In file included from src/mxml.c:79:

include/strlcpy.h:28:14: error: expected parameter declarator

size_t EXPRT strlcat(char *dst, const char *src, size_t size);

             ^

/usr/include/secure/_string.h:111:44: note: expanded from macro 'strlcat'

  __builtin___strlcat_chk (dest, src, len, __darwin_obsz (dest))

                                           ^

/usr/include/secure/_common.h:39:62: note: expanded from macro '__darwin_obsz'

#define __darwin_obsz(object) __builtin_object_size (object, _USE_FORTIFY_LEVEL > 1 ? 1 : 0)

                                                             ^

/usr/include/secure/_common.h:30:32: note: expanded from macro '_USE_FORTIFY_LEVEL'

#    define _USE_FORTIFY_LEVEL 2

                               ^

In file included from src/mxml.c:79:

include/strlcpy.h:28:14: error: expected ')'

/usr/include/secure/_string.h:111:44: note: expanded from macro 'strlcat'

  __builtin___strlcat_chk (dest, src, len, __darwin_obsz (dest))

                                           ^

/usr/include/secure/_common.h:39:62: note: expanded from macro '__darwin_obsz'

#define __darwin_obsz(object) __builtin_object_size (object, _USE_FORTIFY_LEVEL > 1 ? 1 : 0)

                                                             ^

/usr/include/secure/_common.h:30:32: note: expanded from macro '_USE_FORTIFY_LEVEL'

#    define _USE_FORTIFY_LEVEL 2

                               ^

include/strlcpy.h:28:14: note: to match this '('

/usr/include/secure/_string.h:111:44: note: expanded from macro 'strlcat'

  __builtin___strlcat_chk (dest, src, len, __darwin_obsz (dest))

                                           ^

/usr/include/secure/_common.h:39:53: note: expanded from macro '__darwin_obsz'

#define __darwin_obsz(object) __builtin_object_size (object, _USE_FORTIFY_LEVEL > 1 ? 1 : 0)

                                                    ^

In file included from src/mxml.c:79:

include/strlcpy.h:28:14: warning: type specifier missing, defaults to 'int' [-Wimplicit-int]

size_t EXPRT strlcat(char *dst, const char *src, size_t size);

             ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

/usr/include/secure/_string.h:111:44: note: expanded from macro 'strlcat'

  __builtin___strlcat_chk (dest, src, len, __darwin_obsz (dest))

                                           ^~~~~~~~~~~~~~~~~~~~

/usr/include/secure/_common.h:39:31: note: expanded from macro '__darwin_obsz'

#define __darwin_obsz(object) __builtin_object_size (object, _USE_FORTIFY_LEVEL > 1 ? 1 : 0)

                              ^~~~~~~~~~~~~~~~~~~~~

In file included from src/mxml.c:79:

include/strlcpy.h:28:14: error: conflicting types for '__builtin___strlcat_chk'

/usr/include/secure/_string.h:111:3: note: expanded from macro 'strlcat'

  __builtin___strlcat_chk (dest, src, len, __darwin_obsz (dest))

  ^

include/strlcpy.h:28:14: note: '__builtin___strlcat_chk' is a builtin with type 'unsigned long (char *, const char *, unsigned long, unsigned long)'

/usr/include/secure/_string.h:111:3: note: expanded from macro 'strlcat'

  __builtin___strlcat_chk (dest, src, len, __darwin_obsz (dest))

  ^

2 warnings and 6 errors generated.

make: *** [mxml.o] Error 1

 

 

What the best way to build DRSOsc on the Mac OS X?

 

Thanks,

Andriy.

  309   Tue Nov 19 21:49:37 2013 Andriy ZatserklyaniyDRSOsc at Mac OS X Mavericks

Stefan Ritt wrote:

Andriy Zatserklyaniy wrote:

I installed Mac OS package on macbook (late 2013). DRSOsc starts to write file but freezes; need to be restarted to restore connection with DRS4 evaluation board (ordered Aug 2011). 

DRSOsc seems broken on OSX 10.9. I'm working on this right now. Some of the problems are related to wxWidgets, so I'm waiting for a new version running stably under OSX 10.9. The compilation problem related to "strlcpy" comes from the fact that OSX 10.9 now comes with its own version of that function, while all previous versions did not. So simply removing strlcpy.h/c from the project fixes that.

There will be a new version of DRSOsc next month which fixes all this problems, so just stay tuned.

/Stefan 

 I will have beam test next week :-(

I installed wxWidgets-3.0 using MacPorts (and libusb too). After removing strlcpy and hacking of Makefile I managed to build MacOS application. 

 

When I launch DRSOsc.app/Contents/MacOS/DRSOsc from terminal, I see constantly pouring messages about fonts:

2013-11-19 12:21:22.232 DRSOsc[99520:507] CoreText performance note: Client called CTFontCreateWithName() using name "Lucida Grande" and got font with PostScript name "LucidaGrande". For best performance, only use PostScript names when calling this API.

2013-11-19 12:21:22.275 DRSOsc[99520:507] CoreText performance note: Client called CTFontCreateWithName() using name "Lucida Grande" and got font with PostScript name "LucidaGrande". For best performance, only use PostScript names when calling this API.

...

How may I get rid of them?

 

Another problem: I was not able to save data in binary (*.dat) file. I used DRSOsc settings to set binary format, I specified explicit extension *.dat, tried everything (including hiding extension), but was not able to save in binary format. Do I need to apply some trick? How may I hardcode usage of the binary format?

Thanks,

Andriy.

  168   Sat Jun 23 00:29:52 2012 Andrey Kuznetsovtriger for measuring time between pulses in channels

Stefan Ritt wrote:

On the evaluation board, yes. This board is not optimized for high readout rate. If you do your own electronics, like GBit Ethernet, you could be much faster. 

 What is the readout rate via GBit Ethernet that you have achieved?

Where is the bottleneck in ethernet?

What is the proposed scheme by which the GBit Ethernet will be implemented, will the DRS4 Eval Board have to wait for the computer to respond before sending the data (wouldn't this make the readout much slower?), or will the DRS4 Eval Board keep sending the data to the computer?

  243   Wed May 8 06:07:52 2013 Andrey KuznetsovDRS4 v2.0 Eval Board running on higher versions of DRS Oscilloscope program

Hi,

I have an old v2.0 board that I just upgraded firmware on using v4.0.0 download package which has a drs4_eval1.bit for v2.0 boards containing firmware 15158. So I would like to use the latest DRS Oscilloscope program, due to the faster acquisition speeds and advanced calibration techniques, however I seem to be running into a problem.

v4.0 DRS Oscilloscope program displays flat lines in any configuration instead of a pulse that I provide to it (I can't tell if calibration works because all my traces are flat and nothing triggers) but provides ~460Hz. Any idea why v4.0.0 DRS Oscilloscope program does not work with DRS4 Eval Board v2.0 fw:15158?

 

v3.0 DRS Oscilloscope program actually works and displays the pulse that I input (calibration also works), however it only has 64Hz speed due to v3.0.0 not having multithreading capability which is provided in v3.1.0 software version of the program.

 

Can you please upload and post on the website the latest software packages for v2 and v3? I would like to use v3.1.0 DRS Oscilloscope version. (Both Linux and Windows, but Linux preferably)

 

Also, I would like to report that for some reason, I don't know if it happens with v3.0 program used on v2.0 board only or a general issue, but after each calibration of voltage and timing, the trigger does not work. I have to exit the oscilloscope program, and run it again, then the trigger works fine, and the device is calibrated.

Thank you

  244   Wed May 8 19:50:01 2013 Andrey KuznetsovDRS4 installation on Windows 8 issues

I'm also having trouble installing drivers and running DRSOsc program on another computer running Windows 8.


The issue with the driver is that it's not digitally signed.


The issue with the DRSOsc is that it's failing to find libusb0.dll. libusb-win32 seemed to have installed upon DRS4 software install, however the supplied version is Windows 7/8 incompatible, so on Windows 7 computer I had to download libusb_win32 v1.2.6.0 from the official website and install it directly, then everything worked fine. However in Windows 8, I am unable to install libusb-win32 because in  libusb-win32 Inf Wizard installation program when you select for which device the libusb should be used, it asks to install a driver, but when I point to DRS' driver, it says "Unknown Error: 1" and that's that. One way around the libusb issue is to copy the required dll and sys file directly where the .exe is stored.


I will attempt to disable signed driver signature requirement, and see if the driver installs then, but this should really be fixed instead.

ELOG V3.1.4-80633ba