DRS4 Forum
  DRS4 Discussion Forum, Page 4 of 44  Not logged in ELOG logo
New entries since:Thu Jan 1 01:00:00 1970
ID Date Author Subjectup Text Attachments
  864   Tue Feb 15 12:02:29 2022 Stefan RittCannot trigger on pulses, have to trigger on undershootThe trigger comparator is a ADCMP601 unit
which requires a minimum pulse width of 3-4
ns. I see that your pulses are only 1-2 ns
  
  302   Thu Nov 14 11:39:06 2013 SchabloCascading of channels  Hello,  I want use cascading
of channels for 2048 cell - SetChannelConfig(0,8,4),
but i can't understand how . Please, help
  
  303   Thu Nov 14 12:51:56 2013 Stefan RittCascading of channels

    

       
            
 2048_mode.pdf 
  311   Thu Nov 21 14:35:57 2013 SchabloCascading of channels

    

       
            
  
  312   Thu Nov 21 14:45:56 2013 Stefan RittCascading of channels

    

       
            
  
  795   Mon Aug 31 16:44:12 2020 Hans SteigerChannel CascadingDear All,

I have a board with Channel Cascading
Option. I have the problem, that it seems
  
  796   Mon Aug 31 17:17:30 2020 Stefan RittChannel CascadingIf you have a board with cascading option,
it should show the "combined" option
in the 2048-bin option enabled (not grayed),
 Screenshot_2020-08-31_at_16.52.28_.png 
  563   Fri Nov 18 05:52:45 2016 Kurtis NishimuraChannel offsets in GetTime()Hello,

I have a question about the GetTime()
method in DRS.cpp.  I understand how
 offsetInstructions.png 
  565   Mon Nov 21 14:13:32 2016 Stefan RittChannel offsets in GetTime()Cell 700 is arbitrary. You can choose any
cell to align the channels to each other.
The only requirement is that it's always
  
  222   Wed Feb 27 13:47:32 2013 Georg WinnerChip Test - Cell ErrorWhen starting Chip Test in DRS Command
Line Interface, I receive the following message:
Cell error on channel 1, cell
  
  227   Wed Mar 6 13:08:03 2013 Stefan RittChip Test - Cell Error

    

       
            
  
  386   Wed Oct 15 10:14:32 2014 Simon WeingartenClock settings in daisy chain DAQHi,
I'm currently working on a little
DAQ system with four DRS evaluation boards.
  
  387   Wed Oct 15 10:52:58 2014 Stefan RittClock settings in daisy chain DAQ

    

       
            
  
  388   Wed Oct 15 11:34:43 2014 Simon WeingartenClock settings in daisy chain DAQ

    

       
            
  
  389   Wed Oct 15 12:15:58 2014 Stefan RittClock settings in daisy chain DAQHere is the full version
of the program with clock daisy-chaining.
Before switching to the external clock, it
 drs_exam_multi.cpp 
  403   Fri Apr 17 10:07:38 2015 Simon WeingartenClock settings in daisy chain DAQHi Stefan,

do you know how these numbers (400ps
and 60ps) scale with the sampling rate? The
  
  404   Mon Apr 20 13:08:24 2015 Stefan RittClock settings in daisy chain DAQThe resolution coming from the sampling
rate goes into these numbers, but just marginally.
At 5 GSPS, you get a few ps reolution, while
  
  471   Tue Jan 12 17:57:03 2016 Jack BargemannCompiling DRS-examI am trying to compile drs-exam, but am
getting an error message I do not understand:


1>musbstd.obj
  
  472   Tue Jan 12 21:02:31 2016 Stefan RittCompiling DRS-examI guess you are compiling under MS Windows
??? You probably don't link correctly
to the USB lib. Try to compile the examples
  
  781   Wed Oct 23 17:56:26 2019 John JendzurskiComputing corrected time from binary data...what is t_0,0?In the equations for computing the corrected
time for channels other than channel 1, does
anyone know what the term t0,0 refers
 Screenshot.png 
ELOG V3.1.4-bcd7b50