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New entries since:Thu Jan 1 01:00:00 1970
ID Dateup Author Subject Text Attachments
  81   Fri May 14 08:40:14 2010 Stefan RittDVDD Problem of DRS 4

    

       
            
  
  82   Tue May 18 01:47:59 2010 Hao HuanDVDD Problem of DRS 4


   
        
            
  
  83   Tue May 18 08:23:07 2010 Stefan RittDVDD Problem of DRS 4

    

       
            
  
  84   Tue May 18 09:24:02 2010 Stefan RittReference design for DRS4 active input bufferThe design of high frequency differential
input stages with the DRS4 is a challenge,
since the chip draws quite some current at
 ac.pngac_bw.pngdc.pngdc_bw.pngDRS4_ft_V3.jpg 
  85   Wed May 19 02:24:12 2010 Hao HuanDVDD Problem of DRS 4


   
        
            
  
  86   Wed May 19 09:16:02 2010 Stefan RittDVDD Problem of DRS 4

    

       
            
  
  87   Wed May 26 19:18:09 2010 Hao HuanHigh Frequency Input for DRSHi Stefan,
    I read in the
DRS datasheet that the bandwidth for the
  
  88   Tue Jun 1 13:36:18 2010 Stefan RittHigh Frequency Input for DRS

    

       
            
  
  91   Fri Jun 18 11:31:20 2010 Jinhong WangDVDD Problem of DRS 4

    

       
            
  
  92   Fri Jun 18 11:45:18 2010 Stefan RittDVDD Problem of DRS 4

    

       
            
  
  93   Sat Jun 19 10:09:18 2010 Jinhong WangDVDD Problem of DRS 4

    

       
            
  
  94   Tue Jun 22 10:50:19 2010 Jinhong WangReset of DRS4 Hi Stefan, 
      I found
DRS draw a lot of current when applied Reset
  
  95   Tue Jun 22 11:02:30 2010 Stefan RittReset of DRS4

    

       
            
  
  96   Tue Jun 22 11:29:26 2010 Jinhong WangReset of DRS4

    

       
            
  
  97   Tue Jun 22 11:35:18 2010 Stefan RittReset of DRS4

    

       
            
  
  98   Tue Jun 22 11:37:42 2010 Jinhong WangReset of DRS4

    

       
            
  
  99   Mon Jul 12 16:07:37 2010 Stefan RittAnnouncement evaluation board V3Dear DRS4 users,
a new version of the evaluation board
has been designed and is in production now.
 eval3.png 
  104   Mon Jul 19 12:07:04 2010 Jinhong WangFixed Patter Timing Jitter Hi Stefan, can you give some suggestions
on determination of fixed pattern timing
jitter of DRS4?  Thanks~
  
  105   Mon Jul 19 12:47:17 2010 Stefan RittFixed Patter Timing Jitter

    

       
            
 Capture.png 
  106   Wed Jul 21 10:46:32 2010 Jinhong Wang ENOB of DRS Hi, Stefan, I see in your ppt "Design
and performance of 6 GSPS waveform digitizing
chip DRS4" , you define DRS4 ENOB as
  
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