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Thu Jan 1 01:00:00 1970
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Wed Feb 5 13:41:42 2014, Stefan Ritt, Repeated time calibration
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Thu Mar 6 11:12:44 2014, Stefan Ritt, Software drs-5.0.0 fails to compile (drsosc)
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Wed Apr 16 08:30:32 2014, Stefan Ritt, why is the first channel output error?
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Wed Apr 16 10:24:55 2014, Stefan Ritt, DRS4 Evalboard V5 with Windows7Pro64bit
Thu Apr 17 12:02:28 2014, Wang , The first channel is wrong.
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Thu Apr 24 23:03:25 2014, Carlo Stella, drs_exam project fail to compile
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Mon May 19 08:04:57 2014, Stefan Ritt, simultaneous writing and reading with region of interest mode?
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Tue May 27 16:07:17 2014, Stefan Ritt, Spikes in DRS4 data on custom baord.
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Thu Jun 12 12:46:00 2014, Stefan Ritt, DRS eval bord v5 Timing
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Thu Jun 12 17:16:13 2014, Stefan Ritt, CalibrationWaveform
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Mon Jun 16 15:35:59 2014, Osip Lishilin, Announcement of new Evaluation Board V5
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Wed Jul 16 12:10:19 2014, Stefan Ritt, change cascading from 1024 to 2048 bins for each input channel
Wed Jul 30 11:38:58 2014, Tsutomu Nagayoshi, Sampling speed of DRS4 Board ver4
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Wed Jul 30 17:05:06 2014, Stefan Ritt, ROOT program to decode binary data from DRSOsc
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Wed Jul 30 17:05:38 2014, Stefan Ritt, drsosc binary to cern ROOT file conversion
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Tue Aug 26 12:32:21 2014, Stefan Ritt, 10GSps on DRS4 Evm with delay cables
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Fri Sep 12 13:41:43 2014, Stefan Ritt, synchronizing two DRS4 evaluation boards readout with one computer
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Mon Sep 22 14:52:21 2014, Stefan Ritt, compilation error for v5.0.2
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Mon Sep 22 15:04:37 2014, Stefan Ritt, Timing Calibration Fail
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Tue Oct 14 16:51:37 2014, Stephane Debieux, USB Microcontroller firmware
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