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Entry  Wed Nov 30 17:48:39 2016, samridha kunwar, DRS4 Initiation 
    Reply  Wed Nov 30 19:05:24 2016, Stefan Ritt, DRS4 Initiation 
       Reply  Fri Dec 2 15:32:52 2016, samridha kunwar, DRS4 Initiation 
          Reply  Fri Dec 2 16:47:37 2016, Stefan Ritt, DRS4 Initiation 
Message ID: 577     Entry time: Wed Nov 30 19:05:24 2016     In reply to: 576     Reply to this: 578
Author: Stefan Ritt 
Subject: DRS4 Initiation 

Uhh, there are 1000 things which might be wrong. A bit like "my car is not working, it makes strange noise". Without having a look under the hood, there is just some wild guessing:

- Is your ROFS input at the right value? Your O-OFS?

- All VDD voltages there? Input voltage outside the rails?

- Your RSLOAD pulse long enough (>10ns)

- What happens if you put a really big sinal at the input, like 100 MHz sine wave with 2V p-p

The easiest is to have a look at the evaluation board and copy your new board like 1:1, also copy the VHDL readout code. Much easier that to start from scratch.

Stefan

 

 

samridha kunwar wrote:

I am having a general problem getting read back using the ROI mode.  In the transparent mode everything looks good. These are the steps that I take:

1) configure register (b"11111111",addr = "1100")

2) configure write shift register (b"11111111", addr = "1101")

3)  assert DENABLE and DWRITE

4) wait for trigger

5) on trigger deassert DWRITE

6) Strobe RSRLOAD

7)Set drs4 address to enable all channels (address = "1001")

8)give n SRCLK pulses

9) goto 3 and repeat.

 

Am I missing something? Everything looks straight forward based on the manual yet in the readout mode I only get noise. I do get the stop position on SROUT and the refclk is at 475 KHz as desired and I get the desired behaviour  for DTAP toggling at the same frequency as refclk.

 

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