DRS4 Forum
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Entry  Thu Jul 18 01:03:44 2019, Ismael Garcia, Trace Impedance DRS4_Analog_IN.PNG
    Reply  Thu Jul 18 11:37:56 2019, Stefan Ritt, Trace Impedance 
       Reply  Fri Jul 19 01:37:09 2019, Ismael Garcia, Trace Impedance 
          Reply  Sat Jul 20 12:28:14 2019, Stefan Ritt, Trace Impedance 
Entry  Sat Jul 13 01:00:15 2019, Brendan Posehn, Evaluation Board Test Functionality 
    Reply  Mon Jul 15 17:26:50 2019, Stefan Ritt, Evaluation Board Test Functionality 
       Reply  Mon Jul 15 19:34:25 2019, Brendan Posehn, Evaluation Board Test Functionality 
Entry  Tue Jun 25 23:04:29 2019, Si Xie, drs_exam is always reading out a sin wave 
    Reply  Wed Jun 26 13:08:42 2019, Stefan Ritt, drs_exam is always reading out a sin wave 
       Reply  Wed Jun 26 15:10:09 2019, Si Xie, drs_exam is always reading out a sin wave 
          Reply  Mon Jul 8 14:29:12 2019, Stefan Ritt, drs_exam is always reading out a sin wave 
Entry  Wed Mar 7 22:49:38 2018, Rodrigo Trindade de Menezes, Running drs_example.cpp drs_exam.cpp
    Reply  Thu Mar 8 22:54:20 2018, Rodrigo Trindade de Menezes, Running drs_example.cpp 
       Reply  Fri May 4 12:11:57 2018, Stefan Ritt, Running drs_example.cpp 
       Reply  Wed Jun 26 15:17:51 2019, Si Xie, Running drs_example.cpp 
    Reply  Mon Mar 19 15:12:02 2018, Stefan Ritt, Running drs_example.cpp 
Entry  Thu Jun 20 01:36:48 2019, Andrew Peck, Evaluation firmware wait_vdd state 
    Reply  Fri Jun 21 12:54:47 2019, Stefan Ritt, Evaluation firmware wait_vdd state 
       Reply  Mon Jun 24 23:07:35 2019, Andrew Peck, Evaluation firmware wait_vdd state 
Entry  Fri Apr 12 09:39:30 2019, Lev Pavlov, multi-board 
    Reply  Fri Apr 12 09:55:50 2019, Stefan Ritt, multi-board 
       Reply  Fri Apr 12 09:59:15 2019, Lev Pavlov, multi-board 
          Reply  Fri Apr 12 12:50:18 2019, Stefan Ritt, multi-board 
Entry  Thu Mar 14 03:43:49 2019, Deepak Samuel, How to buy DRS evaluation kit 
Entry  Fri Mar 8 19:35:11 2019, Abaz Kryemadhi, ROOT Macro for newest software read_binary.C
Entry  Wed Mar 6 10:09:01 2019, Willy Chang, drscl "no board found" in some Win7 or Win8.X PCs 
Entry  Wed Feb 20 08:03:04 2019, Lev Pavlov, meg? 
    Reply  Wed Feb 20 08:08:42 2019, Stefan Ritt, meg? 
       Reply  Wed Feb 20 12:13:44 2019, Lev Pavlov, meg? 
          Reply  Wed Feb 20 12:56:56 2019, Stefan Ritt, meg? 
             Reply  Thu Feb 21 09:51:24 2019, Lev Pavlov, no board found 
                Reply  Thu Feb 21 09:57:53 2019, Stefan Ritt, no board found 
                   Reply  Mon Feb 25 08:40:44 2019, Lev Pavlov, no board found 
                      Reply  Mon Feb 25 08:48:27 2019, Stefan Ritt, no board found 
Entry  Mon Feb 4 16:42:08 2019, Hans Steiger, Different Distances between the sampling points 
    Reply  Mon Feb 4 16:46:04 2019, Stefan Ritt, Different Distances between the sampling points 
       Reply  Mon Feb 4 17:36:49 2019, Hans Steiger, Different Distances between the sampling points 
          Reply  Mon Feb 4 18:18:22 2019, Stefan Ritt, Different Distances between the sampling points 
Entry  Sat Feb 2 00:13:12 2019, Hans Steiger, Saving Rate (only 15Acq/s) 
    Reply  Sat Feb 2 10:10:22 2019, Stefan Ritt, Saving Rate (only 15Acq/s) 
Entry  Tue Jan 29 14:43:44 2019, Abaz Kryemadhi, ROOT Macro for data acquired with the newest software 
    Reply  Wed Jan 30 17:08:58 2019, Stefan Ritt, ROOT Macro for data acquired with the newest software 
Entry  Wed Jan 30 06:51:37 2019, Saurabh Neema, DRS4 domino wave stability study 
    Reply  Wed Jan 30 08:02:25 2019, Stefan Ritt, DRS4 domino wave stability study 
Entry  Thu Nov 8 11:44:35 2018, Davide Depaoli, Timing Issue 
    Reply  Thu Nov 8 11:54:33 2018, Stefan Ritt, Timing Issue 
       Reply  Thu Nov 8 12:02:34 2018, Davide Depaoli, Timing Issue 
Entry  Mon Nov 5 17:17:08 2018, Sean Quinn, Pi attenuator on eval board inputs? pi_att.PNG
    Reply  Thu Nov 8 09:57:26 2018, Stefan Ritt, Pi attenuator on eval board inputs? 
Entry  Sun Sep 23 02:22:46 2018, Gerard Arino-Estrada, Trigger OUT pulse width variable from 100 us up to 100 ms 
    Reply  Wed Sep 26 14:44:14 2018, Stefan Ritt, Trigger OUT pulse width variable from 100 us up to 100 ms 
       Reply  Wed Sep 26 18:28:20 2018, Gerard Arino-Estrada, Trigger OUT pulse width variable from 100 us up to 100 ms 
          Reply  Wed Sep 26 19:21:03 2018, Stefan Ritt, Trigger OUT pulse width variable from 100 us up to 100 ms 
Entry  Thu May 17 13:29:34 2018, Stefan Ritt, "Symmetric spikes" fixed with.pngScreen_Shot_2018-05-17_at_13.30.23_.pngwithout.png
    Reply  Mon Sep 3 11:17:26 2018, Martin Petriska, "Symmetric spikes" fixed 
       Reply  Tue Sep 4 13:04:30 2018, Stefan Ritt, "Symmetric spikes" fixed 
          Reply  Thu Sep 13 18:09:13 2018, Martin Petriska, "Symmetric spikes" fixed 
Entry  Wed Aug 1 00:49:30 2018, Sean Quinn, Optimal readout speed eval51_adc_50ns.png
    Reply  Tue Aug 21 14:36:44 2018, Stefan Ritt, Optimal readout speed 
Entry  Mon Aug 13 19:44:59 2018, Martin Petriska, Latch delay support 
    Reply  Tue Aug 14 06:10:49 2018, Stefan Ritt, Latch delay support 
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