1. fDOMINO is defined as fREFCLK * 2048
2. Good values can be derived from the evaluation board schematics: C1=4.7nF, C2=1nF, R=130 Ohm
3. A "1" means a logical high level. See Wikipedia: https://en.wikipedia.org/wiki/Logic_level
Dear Sir or Madam,
Good morning，I am using drs4 chip, and the measured fDTAP == 1/350ns, that is, fDOMINO == 1 / 350ns * 2048 == 5.8GHz.
I have three questions:
1. Is fDOMINO determined by the chip itself?
2. C1, C2 and R2 are TBD. I don't know how many to choose. Is there an algorithm?
3."Configure Write Shift Register to contain all 1's"，What, pray, is the meaning of “1's"?