|Guillaume Blanchard wrote:
I am writing a VHDL code to drive a DRS4 chip.
In order to configure the DRS4 chip, I have to set the "Config Register" and the "Write Shift Register" then ... (I do not plan to use simultaneous WR and R so I guess the Write Config Reg. is not needed)
My question is :
When do we have to perform a "Read Shift Register Initialization" ?
Every time before a full read-out, or juste once after a DRS4 reset ?
Further more, is this initialization needed for the ROI mode ?
And at last do the level of the DENABLE and DWRITE signals matter for the "Read Shift Register Initialization" ?
(To sum up : what is the purpose of the Read Shift Register and how does it work ?)
There are two readout modes "Full Readout Mode" and "ROI mode".
In the Full Readout Mode, the Read Shift Register has to be initialized before the first readout by applying the sequence shown in Figure 11 in the data sheet. This clears the full shift register and sets the first cell to "1". In principle in the following events one applies each time 1024 clocks. Since the shift register is circula, the single "1" rotates through the shift register and is at the same position after 1024 clocks. So in principle the register does not have to be re-initialized. To be hones I have never tried this myself, so I'm not completely sure if that works.
In the ROI mode, you initialize the Read Shift Register by a single RSRLOAD pulse as shown in Figure 15. Since the inverter chain stops at different positions in each event, this pulse has to be applied before each event. The SROUT bits will then tell you where the inverter chain has been stopped.
Most people I know of use the ROI mode, since the initialization is much simpler (just a single pulse).