DRS4 Forum
  DRS4 Discussion Forum  Not logged in ELOG logo
 Back  |  Find  |  Login  |  Help 
Entry  Wed May 13 09:31:18 2015, Chenfei Yang, transparent-mode voltage tek00000_.png
    Reply  Wed May 13 09:45:51 2015, Stefan Ritt, transparent-mode voltage 
       Reply  Wed May 13 09:55:09 2015, Chenfei Yang, transparent-mode voltage 
          Reply  Wed May 13 10:16:40 2015, Stefan Ritt, transparent-mode voltage 
             Reply  Wed May 13 10:27:43 2015, Chenfei Yang, transparent-mode voltage 
             Reply  Wed May 13 12:34:49 2015, Stefan Ritt, transparent-mode voltage 
                Reply  Wed May 13 12:52:22 2015, Chenfei Yang, transparent-mode voltage 
                Reply  Wed May 13 16:13:07 2015, Chenfei Yang, transparent-mode voltage 
                   Reply  Wed May 13 16:25:24 2015, Stefan Ritt, transparent-mode voltage 
Message ID: 414     Entry time: Wed May 13 09:55:09 2015     In reply to: 413     Reply to this: 415
Author: Chenfei Yang 
Subject: transparent-mode voltage 

Here's the problem. My external ADC has 2Vpp differtial input voltage range. And the common-mode voltage of the inputs need to be 1.3V. I cannot make both the transparent-output and the readout-output meet the ADC input requirement.

Stefan Ritt wrote:

The ROFS signal has no effect in the transparent mode, so you have to adjust O_OFS between sampling and transparent mode accordingly. Either use a DAC or two voltages with an analog switch.

Chenfei Yang wrote:

Hello Mr. Stefan Ritt

  For DRS4 differential inputs ranges form 500mV to 1100mV, with ROFS set to 1.55V, O_OFS set to 1.3V, the outputs of DRS4 is shown in the attachment.

  The left part of the waveform,DRS4 works in transparent mode, and then the readout take place. The DMV of transparent mode is bigger then the readout mode, and that makes ADC sampling harder.How may I solve this problem?

  Best wishes!

                                 Chenfei Yang

 

 

ELOG V3.1.5-fe60aaf