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Entry  Sun Jun 12 08:45:52 2016, Michael, problems of DRS4 
    Reply  Wed Jun 15 14:49:00 2016, Stefan Ritt, problems of DRS4 
Message ID: 528     Entry time: Sun Jun 12 08:45:52 2016     Reply to this: 530
Author: Michael 
Subject: problems of DRS4 

Hi

I want to use DRS4 to digitize 16 channels of signals. The width of signal is about 20 ns, with frequency of 50Hz. The time differences between these 16 signals are not constant, arranging from 3us to 0. I am confused about this in some aspects.

  1. Can I use SIMULTANEOUS WRITINT AND READING to realize this? I saw the VHDL program, and if I understand it correctly, it did not work at this state.
  2. Or sampling at 1GSPS, using CASCADING OF CHANNELS, I can sample signal at most 4us or 8us, then digitizing all signals of one chip. Have you tested 4 or more channels cascading before?

Besides, any advice will be helpful!

Thank you.

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