DRS4 Forum
  DRS4 Discussion Forum  Not logged in ELOG logo
Entry  Sun Mar 21 02:03:44 2010, Hao Huan, PLL Loop Filter Configuration 
    Reply  Mon Mar 22 09:12:19 2010, Stefan Ritt, PLL Loop Filter Configuration 
Message ID: 57     Entry time: Sun Mar 21 02:03:44 2010     Reply to this: 58
Author: Hao Huan 
Subject: PLL Loop Filter Configuration 

Hi Stefan,

    in the datasheet it says at 6GSPS the typical loop filter parameters are 220Ω, 2.2nF and 27nF. If I want to run the Domino wave nominally at 1GHz, i.e. with a reference clock frequency around 0.5MHz, is there any recommended loop filter configuration? Is the setup of the evaluation board, that is, 220Ω, 3.3nF and 33nF an optimal choice?

    Thank you very much.

 

ELOG V3.1.5-fe60aaf