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Entry  Sun Mar 21 02:03:44 2010, Hao Huan, PLL Loop Filter Configuration 
    Reply  Mon Mar 22 09:12:19 2010, Stefan Ritt, PLL Loop Filter Configuration 
Message ID: 58     Entry time: Mon Mar 22 09:12:19 2010     In reply to: 57
Author: Stefan Ritt 
Subject: PLL Loop Filter Configuration 

Hao Huan wrote:

in the datasheet it says at 6GSPS the typical loop filter parameters are 220Ω, 2.2nF and 27nF. If I want to run the Domino wave nominally at 1GHz, i.e. with a reference clock frequency around 0.5MHz, is there any recommended loop filter configuration? Is the setup of the evaluation board, that is, 220Ω, 3.3nF and 33nF an optimal choice?

The setup of the evaluation board is a good compromise which runs between 1 GHz and 5 GHz. Unfortunately I never found the time to investigate this in more detail. So if someone is willing to measure settling time and phase jitter with various combinations of R, C1 and C2, I'm more than happy to include this into the datasheet. 

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