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Entry  Wed Mar 14 09:13:39 2018, chen wenjun, confusion about the description in drs.cpp 20180314161201.jpg
    Reply  Fri Mar 16 14:00:06 2018, Stefan Ritt, confusion about the description in drs.cpp 
       Reply  Sun May 6 08:13:37 2018, chen wenjun, confusion about the description in drs.cpp 
          Reply  Sun May 6 11:45:09 2018, Stefan Ritt, confusion about the description in drs.cpp 
Message ID: 689     Entry time: Sun May 6 08:13:37 2018     In reply to: 673     Reply to this: 690
Author: chen wenjun 
Subject: confusion about the description in drs.cpp 

Hi Stefan:

  I'm still confused that althought the 8 bits buffer is enough,the FPGA receive the command through the uc_data_i register which is 16 bits wides.As we can see in the firmware, the locbus_addr is 32 bits wides. Does it means the locbus_addr[31:8] are always '0' because the address in buffer is only 8 bits. Does it means the usrbus_status_sel and usrbus_ram_sel are also '0' all the time .

thanks!

chen

Stefan Ritt wrote:

The FPGA is very small, so it only has an address space of 256 bytes. Look at the definition in DRS.cpp

#define USB_CTRL_OFFSET                 0x00    /* all registers 32 bit */
#define USB_STATUS_OFFSET               0x40
#define USB_RAM_OFFSET                  0x80

The registers are 32 bits wide, but the addresses only run from 0 to 255, and thus a single byte is enough for addressing them.

chen wenjun wrote:

Hi,Stefan:

  recently,whtn I study the drs.cpp code ,I found that  the buffer[1] is char but the addr and the base_addr are all unsigned int,isn't there any problem that the addr may be cut off to 8 bits? Also ,I found that the data fpga recieved from the usb is 16 bits,so how can fpga get the true 32bits address from the PC.

 

 

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