Tue Jan 12 16:06:07 2016, Stefan Ritt, Use of Channel Cascading in drs_exam.cpp
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Hi Larry,
sorry my late reply, swamped with work here. You were right in the modifictions you did, congrats. The speed limitation of 500 events come from
USB2, which simply is not fast enough. The 500 Hz are mentioned on the evaluation board web site, so you should have seen that before ordering. Some people |
Tue Jan 12 21:02:31 2016, Stefan Ritt, Compiling DRS-exam
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I guess you are compiling under MS Windows ??? You probably don't link correctly to the USB lib. Try to compile the examples coming with libusb-1.0
to make you everything is right there.
Jack |
Thu Jan 14 14:11:06 2016, Stefan Ritt, Dtap stops toggling after 40msec
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Thanks for the update, I will add a note into the data sheet.
mony
orbach wrote:
surrey i forgot to update.. |
Fri Jan 15 08:09:00 2016, Stefan Ritt, Triggering of DRS4 in the fastest sampling mode
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Hi Chris,
if you ever used an oscilloscope, you might be familar with the button controlling the riger in respect to "risign edge" vs. "falling
edge". I copied the same for the DRS software. So just click on that button: |
Tue Feb 16 11:21:43 2016, Stefan Ritt, Saving histogram data
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There is no histogram save functoinality in ther DRSOscilloscope program - on purpose. The board and the software are meant to evaluate the board, not
to replace a full DAQ system. If we want to save histograms, you maybe also want to set the range, make cuts, do fits etc. So it would take lots of resources
to add all that. Therefore we recommend to use the stand-alone C program drs_exam.cpp to read the board, the you can either do whatever you want in the |
Mon Feb 29 13:09:29 2016, Stefan Ritt, baseline shift
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The baseline shift comes from some instable power supply inside the evaluation board which cannot be controlled to the mV level. In a real measurement,
you usually get an additional baseline shift due to some environmental electromagnetic interferences, such as a 50 Hz signal. People fix this shifting
baseline by always aquiring a small portion (10-20 samples) of the baseline before any signal from a particle detector. The signal is then corrected event-by-event |
Mon Feb 29 14:09:21 2016, Stefan Ritt, two DRS4 boards configuration with 2048 samples each
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The multi-board mode has never been tested with 2048 samples, so is very likely not to work. I don't know yet how much work this will be to
fix, but I'm on a business trip the next three weeks and probably will only have time to look at it when I return.
Stefan |
Tue Mar 22 12:54:41 2016, Stefan Ritt,
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Yes this is correct. But it is a sample-and-hold circuit. So the sampling cell follows the input for 3.2 ns, then samples and holds the current value
at the end of the period.
Dominik |
Thu Mar 31 19:35:06 2016, Stefan Ritt, Trigger on the And of a positive and negative signal
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No. You have to use an inverter for one of your signals.
Stefan
Abaz |
Thu Mar 31 20:34:25 2016, Stefan Ritt, Trigger on the And of a positive and negative signal
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Here is one (SI 100): https://www.picoquant.com/products/category/accessories/adapters-splitters-cables-various-accessories-for-photon-counting-setups
Abaz
Kryemadhi wrote:
Ok, thanks! do you know an easy in-line inverter like mini-circuit |
Sat Apr 2 11:41:07 2016, Stefan Ritt, Question about timimng calibration
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The evaluation board normally has 1024 bins per channel. We offer an option with 2048 bins using channel cascading, to capture longer waveform windows.
The binary data format is however defined as having 1024 bins. Therefore, for the 2048 bin boards, the software averages over two adjacent cells and saves
effectively 1024 bins. The noise of each bin improves this way by sqrt(2). The time however is not very well defined, since you average the voltage of |
Mon Apr 4 11:31:34 2016, Stefan Ritt, DRS Oscilloscope freezing after a long run
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Dear Daniel,
sorry my late reply, I'm pretty busy these days. The behavior you report has not been seen before, but I guess no one tried to take such
long runs of data yet. Can you confirm that the problem also occurs without writing data to disk, or is it disk-related? I guess you use it under Windows |
Mon Apr 4 12:08:15 2016, Stefan Ritt, DRS Oscilloscope freezing after a long run
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Then it seems that there is some USB communication problem. I heard this also from other people, that the USB data transfer under Windows has sometimes
problems. I develop and run the board under Mac OSX, and there the same software runs for days without problem. So I guess it's related to the underlying
libusb lib which is used by the DRS oscilloscope, on which I have no influence. So the only advice I can give is to take shorter series of data. Anyhow |
Tue Apr 5 16:08:59 2016, Stefan Ritt, DRS Oscilloscope freezing after a long run
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I tried this night to run the board at a 10 Hz rate with an external pulser, without writing, and it did not freeze after ~14 hours of running on Mac
OSX. This night I will try again with writing.
Stefan |
Wed Apr 6 08:41:08 2016, Stefan Ritt, DRS Oscilloscope freezing after a long run
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Even with writing for one night no problem (see below). Have you checked how big your data file is? I guess there is a limit under Windows of 2 GB. If
that's the case, you have to write shorter files.
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Tue Apr 26 09:54:16 2016, Stefan Ritt, Negative fCellDT values from GetTimeCalibration()
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I just realized that the negative bin widht is not explicitly mentioned in the quoted paper. So let me explain it here:
The negative value of cell 498 is correct and "real" in the sense that the signal is first captured in cell 498 and later
in cell 497. This is due to the exact layout of the cells on the chip and the input signal. Cell 498 is simply much closer to the input, so sees the |
Tue Apr 26 13:42:42 2016, Stefan Ritt, DRS4 purchase information
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Just be patient. Anita is not at work this week.
Konstantin
Gusev wrote:
Hi, |
Wed Apr 27 09:04:01 2016, Stefan Ritt, serial number problem
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If dis- and reconnecting the board does not help, there is the (small) chance that the serial number got erased in the board. You can re-set it with
the "drscl" command line tool:
$ drscl |
Thu Apr 28 15:46:34 2016, Stefan Ritt, Best settings for time measurements
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The DRS4 chip has been designed to work best at high sampling speeds. At 700 MSPS, the chip is at it's limit and timing is very poorr (ns?). In order
to get good timing, run it at least at 2 GSPS.
Stefan |
Thu Apr 28 15:47:53 2016, Stefan Ritt, New software version and binary format
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A new software version 5.0.5 has been released today. This fixes a few bugs in multi-board configurations, and adds saving of the scaler values into
XML and binary files. Please note that the binary file format has been changed for that. The new format is described in an updated manual (page
25), and reflected in a new read_binary.cpp program contained in the distribution. |