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New entries since:Thu Jan 1 01:00:00 1970
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ID Date Author Subject Text
  926   Mon Jul 7 16:53:26 2025 Stefan RittWrong Firmware Version: board has 13279, required is 15147. Board may not work properly
  925   Sat Jul 5 04:36:13 2025 Sandeep GodiyalWrong Firmware Version: board has 13279, required is 15147. Board may not work properly
  924   Thu May 15 00:01:20 2025 Jonathan BradshawHandling of Write Shift Register and Write Config Register
  923   Tue May 13 08:51:34 2025 Stefan RittHandling of Write Shift Register and Write Config Register
  922   Tue May 13 04:10:30 2025 Jonathan BradshawHandling of Write Shift Register and Write Config Register
  921   Fri May 9 08:26:17 2025 Stefan RittClarification of full channel readout
  920   Fri May 9 08:17:50 2025 Stefan RittHandling of Write Shift Register and Write Config Register
  919   Thu May 8 23:41:03 2025 Jonathan BradshawHandling of Write Shift Register and Write Config Register
  918   Thu May 8 23:23:19 2025 Jonathan BradshawClarification of full channel readout
  917   Tue Apr 1 16:24:33 2025 Matías Tobardrs_exam.cpp not compile
  916   Thu Mar 27 15:53:10 2025 Justin TabbettNoisy counts with adapted drs_exam.cpp
  915   Wed Mar 26 08:42:08 2025 Stefan Rittdrs_exam.cpp not compile
  914   Tue Mar 25 16:31:41 2025 Matías Tobardrs_exam.cpp not compile
  913   Mon Jan 6 12:52:23 2025 Stefan RittProblem with C++ script to use DRS4 evaluation board. Not taking data.
  912   Fri Dec 27 22:04:48 2024 Matias HenriquezProblem with C++ script to use DRS4 evaluation board. Not taking data.
  911   Mon Dec 23 19:31:31 2024 Matias HenriquezTrigger OUT pulse width variable from 100 us up to 100 ms
  910   Fri Dec 20 20:35:31 2024 Matias HenriquezProblem with C++ script to use DRS4 evaluation board. Not taking data.
  909   Fri Jun 28 23:33:51 2024 Patricia LecomtiError when running drsosc
  908   Tue May 21 18:13:08 2024 Rebecca HicksError when running drsosc
  907   Thu Feb 22 10:37:03 2024 Stefan RittSimulation of FPGA
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