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ID Date Author Subject Text Attachments
  797   Tue Sep 22 17:45:26 2020 Elmer GrundemanExternal triggeringDear all,

I had a question about timing jitter
and external triggering.
  
  796   Mon Aug 31 17:17:30 2020 Stefan RittChannel CascadingIf you have a board with cascading option,
it should show the "combined" option
in the 2048-bin option enabled (not grayed),
 Screenshot_2020-08-31_at_16.52.28_.png 
  795   Mon Aug 31 16:44:12 2020 Hans SteigerChannel CascadingDear All,

I have a board with Channel Cascading
Option. I have the problem, that it seems
  
  794   Mon Aug 31 10:52:42 2020 Stefan RittDynamic Range Evaluation Board and SoftwareYou cannot go below -0.5V for the inputs,
since the board does not have an internal
negative power supply, which would be necessary
  
  793   Sat Aug 29 22:00:30 2020 Hans SteigerDynamic Range Evaluation Board and SoftwareDear Evaluation Board Team,

 

currently I am facing the problem
  
  792   Tue Jul 28 22:40:44 2020 Razvan Stefan Gorneano board foundI have a very similar problem, the command
line doesn't work but the oscilloscope
program does! Tried to fix it using Zadig
 DRS4_scope.png 
  791   Tue May 26 12:44:16 2020 Stefan RittDomino waveLook at the attached picture. For simplicity,
only 4 cells are open and tracking the input
signal. Time is flowing from top to bottom.
 Screenshot_2020-05-26_at_12.43.40_.png 
  790   Tue May 26 11:10:27 2020 xgggDomino waveHi Stefan,

According to the datasheet DRS_rev09,
the write signal is always 16 cells wide.
  
  789   Mon May 25 03:36:12 2020 Keita MizukoshiDRS4 Evaluation board control tool 'drscl' with macro fileThank you very much. That is what I wanted.




  
  788   Fri May 22 13:24:51 2020 Stefan RittType check at DOFrame.h in official softwareThe software is a bit outdated, I will
soon make a new release. 

In meantime, you can replace that
  
  786   Fri May 22 12:53:33 2020 Stefan RittDRS4 Evaluation board control tool 'drscl' with macro fileThere is an example program in the distribution
under software/drscl/drs_exam.cpp which is
a stand-alone program to do what you need.
  
  785   Thu May 21 07:38:05 2020 Keita MizukoshiType check at DOFrame.h in official softwareHi,

 

I've failured to compile official
  
  784   Thu May 21 07:18:48 2020 Keita MizukoshiDRS4 Evaluation board control tool 'drscl' with macro fileDear experts,

 

I would like to use DRS4 evaluation
  
  783   Mon Mar 23 15:03:28 2020 Ajay KrishnamurthyUSB trigger issueHello,

I had forgotten to disable the
turn off the power to the USB drive on Windows
  
  782   Fri Oct 25 16:39:07 2019 Stefan RittComputing corrected time from binary data...what is t_0,0?t0,0 refers to the time of cell #0 of channel
#0. So basically you keep channel 0 fixed,
calculate the difference of each channel's
  
  781   Wed Oct 23 17:56:26 2019 John JendzurskiComputing corrected time from binary data...what is t_0,0?In the equations for computing the corrected
time for channels other than channel 1, does
anyone know what the term t0,0 refers
 Screenshot.png 
  780   Tue Oct 15 08:14:17 2019 Danyanghow to acquire the stop position with channel cascadingThanks a lot. The problem is solved when
A3-A0 is set 1101 and srclk keeps low.

Best Regards,
  
  779   Mon Oct 14 15:27:09 2019 Stefan Ritthow to acquire the stop position with channel cascadingIf you configure the Write Shift Register
with 01010101b, then all you have to do after
a trigger is to set A3-A0 to 1101. The WSROUT
  
  778   Mon Oct 14 13:44:26 2019 Danyanghow to acquire the stop position with channel cascadingYes, firstly I configured the chip
with 4x2048 bins by setting the Write Shift
Register to 01010101b, A3-A0
  
  777   Mon Oct 14 12:56:13 2019 Stefan Ritthow to acquire the stop position with channel cascadingNote that you have to read out the Write
Shift Register only if you do channel cascading,
e.g. configuring the chip with 4x2048 bins
  
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