 Wed Jan 15 17:11:14 2014, Stefan Ritt, Some bug fixes and questions
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Andrey Kuznetsov wrote:
The DRSCallback *pcb is missing an if statement in the code when DRS Oscilloscope software |
 Wed Mar 5 21:54:13 2014, Hermann-Josef Mathes, Software drs-5.0.0 fails to compile (drsosc) 
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Hi,
the latest software drs-5.0.0.tar.gz fails to compile on my freshly installed SuSE 13.1 whereas the previous 4.0.1 is compiling out-of-the-box.
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Thu Mar 6 11:12:44 2014, Stefan Ritt, Software drs-5.0.0 fails to compile (drsosc)
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Hermann-Josef Mathes wrote:
Hi, |
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Wed Feb 16 14:06:45 2022, Dmitry Hits, Sliders missing in drsosc
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Hi everyone,
Did anyone have a "missing sliders problem" in GUI (see attachment) accompanied by the following message in the terminal.
(drsosc:4611): Gtk-WARNING **: 14:05:11.249: Negative content width -4 (allocation 20, extents 12x12) while allocating gadget (node scale, owner |
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Thu Feb 22 01:21:11 2024, Rod McInnis, Simulation of FPGA
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Hello:
A bit of background: I am working on a project that is utilizing the DRS4 Evaluation board as a prototype platform for a dedicated, special
use capture. We will only be utilizing one channel of the ADC capture, and the 1024 samples is more than enough. |
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Thu Feb 22 10:37:03 2024, Stefan Ritt, Simulation of FPGA
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The Cypress has its own firmware, contained in the distribution under firmware/CY7C68013A/drs_eval.c. There you can see how the data is fetched. I kind
of forgot how exactly it worked, since I wrote that code back in 2011. But most if the Cypress code is just the configuration of the USB, the communication
with the FPGA is kind of straight forward in the Cypress implementation. But you have to read the manual of that chip to understand it. |
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Tue Apr 28 11:44:07 2009, Stefan Ritt, Simple example application to read a DRS evaluation board
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Several people asked for s simple application to guide them in writing their own application to read out a DRS board. Such an application has been added
in software revions 2.1.1 and is attached to this message. This example program drs_exam.cpp written
in C++ does the following necessary steps to access a DRS board: |
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Wed Apr 29 07:57:33 2009, Stefan Ritt, Simple example application to read a DRS evaluation board
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Stefan Ritt wrote:
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Mon Apr 5 17:57:41 2010, Heejong Kim, Simple example application to read a DRS evaluation board
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Stefan Ritt wrote:
Several people asked for s simple application to guide them in writing their own application to read out |
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Tue Apr 13 14:15:16 2010, Stefan Ritt, Simple example application to read a DRS evaluation board
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Heejong Kim wrote:
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Tue May 30 20:45:30 2017, Esperienza Giove, Setting input range
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Hello,
is it possible to set a completely negative input range like -1 to 0 or -0.95 to 0.05 ? |
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Tue May 30 21:00:26 2017, Stefan Ritt, Setting input range
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See elog:531
Esperienza
Giove wrote:
Hello, |
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Tue May 30 21:22:10 2017, Esperienza Giove, Setting input range
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Thank you
Stefan
Ritt wrote:
See elog:531 |
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Tue Mar 9 23:28:45 2010, Hao Huan, Serial Interface Frequency of the DRS Chip
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Hi Stefan,
in the DRS4 datasheet I read that the optimal frequency for SRCLK is 33MHz. However in the evaluation board firmware SRCLK is
toggled at rising edges of the internal 33MHz clock, i.e. the frequency of SRCLK itself is 16.5MHz instead. Is that frequency better than 33MHz? |
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Wed Mar 10 10:07:28 2010, Stefan Ritt, Serial Interface Frequency of the DRS Chip
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Hao Huan wrote:
in the DRS4 datasheet I read that the optimal frequency for SRCLK is 33MHz. However in the evaluation |
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Thu Mar 18 21:38:10 2010, Hao Huan, Serial Interface Frequency of the DRS Chip
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Stefan Ritt wrote:
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Thu Mar 18 22:10:41 2010, Stefan Ritt, Serial Interface Frequency of the DRS Chip
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Hao Huan wrote:
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Tue Mar 1 19:03:37 2022, Keita Mizukoshi, Scaler issue to evaluate live time
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Hi. I'm trying to evaluate livetime of the evaluation board with the hardware scaler. I'm facing a strange issue.
I took the rate with the function, DRS->GetScaler(int channel).
I guess that channels 0--3 mean the rate for the channel, and channel 4 means the counter of the trigger. |
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Thu Mar 3 16:14:16 2022, Stefan Ritt, Scaler issue to evaluate live time
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The scalers are read out 10x per seconds, so they have an accuracy of 10 Hz. I tried a 50 Hz pulser, and measured 40 Hz, I tried 52 Hz and measured 50
Hz. This is about what you can expect.
The scaler rate is measured after the discriminator of the trigger, so the trigger level also affects the scaler reading. If you have a 100 mV |
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Fri Mar 4 03:55:33 2022, Keita Mizukoshi, Scaler issue to evaluate live time
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Thank you very much for your explanation.
I would like to show you a pulse example ('black line is the threshold). |