Hello, thanks for your answer. Unluckily if i try to reset in this way it keeps hanging

musb_write: requested 10, wrote 0, errno -7 (Unknown error 18446744073709551609)
musb_read error 0
musb_write: requested 10, wrote 0, errno -7 (Unknown error 18446744073709551609)
musb_read error 0
Invalid magic number: 0000
musb_write: requested 10, wrote 0, errno -7 (Unknown error 18446744073709551609)
musb_read error 0
musb_write: requested 10, wrote 0, errno -7 (Unknown error 18446744073709551609)
musb_read error 0

I also tried with sudo tee /sys/bus/usb/drivers/usb/unbind and binding again; same thing happens. It seems the board needs to be reset when this happens. Is there a way to do that - to reset the board instead of usb?

Thank you

There is no other way to reset the board. As I said, people running this under Windows or MacOS are fine, so maybe this calls for a change of OS.

Hi

We are working with the DRS 4 V5 version and we investigated an issue with the trigger at rates below ~120 Hz.

As long as we have a trigger rate of more than 125 Hz. everything seems to work fine and we are recording more or less all events.

As soon as we go lower in input trigger rate to 100Hz, we see a drop in trigger rates to approx 15 - 20 Hz.

When we use the new firmware we can see that the busy signal is  0 for much longer times than usual up to .5 seconds.

We made a plot of input trigger rate vs trigger rate of drs: https://plot.ly/~simon.corrodi/316

In the  oscilloscope plots one can see the the trigger in in yellow and the trig out from drs board in blue.

Do you have any idea what could be the reason?

We also

Hi,

We did a further investigation of this problem:

We figured out that this issue seems to be related to the kernel.

We tested it now on two machines with Ubuntu 14.04.2 LTS (kernel 3.16.0-41), one with RHEL 6.6 (kernel 2.6.32) , one with Fedora 20 (kernel 3.18.7) and one with Mac OSX. We see this issue  with the Ubuntu and the fedroa  machines.Both have a kernel above 3.0 while RHEL has a kernel of 2.6

We can repoduce the problem on all input channels as a trigger. 

I will try to find out what could be the cause of it.

Cheers

Felix

Not inside the board. Each channel has a single discriminator. You can select to trigger on a rising or falling edge, but you don't have two levels. What you can do however is to make an external trigger, like using old NIM logic. You can make discrimaiton with different levels and use a coincidence unit to combine them. Then feed the trigger into the external trigger input of the evaluation board (5V TTL level, not NIM level!).

Stefan

Hi,

I would like to use the DRS4 board with LabView for fast readout.
Do you know anyone who has written a VI for that?

Thanks,
Christian

Hello,

Did you start to write some VI to interface DRS4board with labview ?

i also have in mind to do that.I am surprised that nobody alraedy did it since there is no answer toyour question

gerard

Hi,

https://forge.physik.rwth-aachen.de/projects/drs4-rwth

Not sure about their licensing, but is it possible to add latch delay support to official firmware ?

Best regards

Martin

I put that on the wish list, but I won't have time for that in the next months.

Stefan

Hi DRS4 Experts,

I have an extremely naive question: Is there any official macro to unpack the DRS4 binary files? All I am looking to do is to plot a few of my waveforms and manipulate them in root. I am using OSX 10.10 and ROOT 5.34.

Thanks in advance,

Will

I should of course mention that I looked through the DRS4 website and didn't see anything obvious: https://www.psi.ch/drs/evaluation-board

Thanks,

Will

Have a look here: elog:361

Hi Stefan,

This is absolutely perfect.

Thanks,

Will

I don't believe I fully understand how the timing works between multiple channels on DRS4 board, even after reading the manual, but I am hoping to measure a time difference between two channels longer than 1024/sampling rate. So far, I have written a program in Matlab to extract timing and voltage information from the binary file to find the time difference between two channels that are set with the AND trigger logic and appear within approximately 80 ns of each other at a sampling rate of 1 GSPS. This works as intended, but I would now like to try to measure time differences of anywhere between 50 ns and several ms within a single spectrum. Since this is out of the range of only 1024 channels above 1GSPS, is it possible for the board to keep track of the time between two trigger pulses that occur at time differences longer than 1024/sampling rate?

Thank you very much for your help, and if I am severely misunderstanding how the board works, please forgive my ignorance and feel free to correct me,

~Randall

Edit: I forgot to mention that I am collecting the data using the provided DRS4 Oscilloscope software.

You cannot measure times longer than 1024/sampling rate.

Stefan

Hello,

I can compile version 5.0.3 of DRS4sc on Mac OSX 10.0 without errors but when I want to execute the program I get the following error:

[home]$ ./DRSOsc
DRSOsc(48068,0x7fff7ac5e300) malloc: *** error for object 0x7f88d9434a80: incorrect checksum for freed object - object was probably 
modified after being freed.
*** set a breakpoint in malloc_error_break to debug

Is this a known error? Will it be fixed in the next release?

> Hello,
> 
> I can compile version 5.0.3 of DRS4sc on Mac OSX 10.0 without errors but when I want to execute the program I get the following error:
> 
> [home]$ ./DRSOsc
> DRSOsc(48068,0x7fff7ac5e300) malloc: *** error for object 0x7f88d9434a80: incorrect checksum for freed object - object was probably 
> modified after being freed.
> *** set a breakpoint in malloc_error_break to debug
> 
> Is this a known error? Will it be fixed in the next release?

When I compile on OSX 10.10.1 with XCode 6.1.1 I get no error. I'm using wxWidgets 3.0.0. Same when I compile with the command line 
tools (which you first have to install from Apple) via "make", "make app", "open ./DRSOsc.app". You cannot start a graphical program 
directly from the command line like under Linux, you have to make an app and the do "open <app>".

Best regards,
Stefan

Dear All,

I'm troubleshooting a board which uses the DRS4 and adopts an analog front end very similar to the evaluation board. As a result, we rely on the eval board as a reference. In doing so we've encountered an issue in the manual:

The high resolution photo in Figure 1. is useful, but it seems to correspond to an older version of the board. For instance, the RF switch can't correspond to the schematics of Rev5.1 in the appendix.

Request: Could the manual be updated with a high resolution image of Rev5.1. Also, could a high resolution of the bottom side of the board be included in the manual? This is desirable since it has the version number and contact information, so it will remove any ambiguity about what board you're looking at and what schematics you should refer to.

A second question, which might be overly broad: what is the impact of installing the optional components (marked * in the schematics) on the analog front end? Why are a lot of these left uninstalled on the eval board?

Thanks,

Sean

I updated the picture in the manual with a current picture of a Rev5.1 board, and also added a picture of the bottom side. If you need a picture without the blue labels, have a look at https://www.psi.ch/drs/old-evaluation-boards at the bottom.

Here is the explanation of the optional components:

- R1, C2, R6, R29, R30 and same components for other channels: Normally the board is AC-coupled. You can make the board DC-coupled by briding C1, C9, C13, removing R6, C2, adding R1, adding R29, removing R30. The CAL signal then enters before the THS4508. We found that DC coupling gives slightly higher noise and is prone to high input DC levels, so we ship the board usually AC-coupled.

- R84 & Co. defines the hysteresis of the trigger comparators as described in the schematics

- R99-R106, R143: If soldered, the board is configured in cascading mode with 4 channels @ 2048 bins. R143 tells the FPGA that we are in this mode, so the firmware can correctly configure the DRS4

- R118 & Co. defines the MCX output level to be either 3.3V or 5V (default)

- R146-R149 connect JTAG to the uC. We planned at one point to make firmware upgrades through USB, but we never implemented that, so these resistors are not soldered.

I hope I covered everything. If I overlooked any optional component please tell me.

Cheers,
Stefan