DRS4 Forum

DRS4 Discussion Forum, Page 38 of 40  Not logged in

Find |  Login |  Help

Full | Summary | Threaded     781 Entries

Goto page Previous  1, 2, 3 ... 37, 38, 39, 40   Next

ID Date Author Subject Text   548   Tue Oct 11 22:11:26 2016 Stefan Ritt time difference between 2 channels only ~30-35ps @ 5GSmples/s Thank you very much! I will check it tomorrow! -d Concerning the offset, it looks      412   Wed May 13 09:31:18 2015 Chenfei Yang transparent-mode voltage Hello Mr. Stefan Ritt   For DRS4 differential inputs ranges form 500mV to 1100mV, with ROFS set      413   Wed May 13 09:45:51 2015 Stefan Ritt transparent-mode voltage The ROFS signal has no effect in the transparent mode, so you have to adjust O_OFS between sampling and transparent mode accordingly.      414   Wed May 13 09:55:09 2015 Chenfei Yang transparent-mode voltage Here's the problem. My external ADC has 2Vpp differtial input voltage range. And the common-mode voltage of the inputs      415   Wed May 13 10:16:40 2015 Stefan Ritt transparent-mode voltage I see your point. Actually I will soon have the same issue since we design right now a board with an AD9637 using the transparent      416   Wed May 13 10:27:43 2015 Chenfei Yang transparent-mode voltage I'm using an AD9252, 0.9V common mode voltage is suggested and I already use 8 un-switchable level shifters. Just as you      417   Wed May 13 12:34:49 2015 Stefan Ritt transparent-mode voltage There might be a solution. How do you bias th input of the DRS4 chip? If you use a scheme as described      418   Wed May 13 12:52:22 2015 Chenfei Yang transparent-mode voltage Yes. I use exactly the same scheme as you mentioned. I'll try your solution.      419   Wed May 13 16:13:07 2015 Chenfei Yang transparent-mode voltage If using a ROFS of 0.9V, the input would not between 1.05V~2.05V better non-linearity area. Is that appropriate?      420   Wed May 13 16:25:24 2015 Stefan Ritt transparent-mode voltage To get the good linearity, you need indeed ROFS = 1.05V. With a O-OFS of 0.9V, a zero input signal would give you DRS_OUT+=1.05V      158   Tue Mar 20 16:23:33 2012 Martin Petriska triger for measuring time between pulses in channels  I have two BaF2 detectors with PMT connected to Ch1 and Ch2. At this time Im using external triger module to start DRS4.      159   Tue Mar 20 16:33:50 2012 Stefan Ritt triger for measuring time between pulses in channels                                160   Wed Mar 21 09:33:00 2012 Martin Petriska triger for measuring time between pulses in channels                                161   Wed Mar 21 09:39:33 2012 Stefan Ritt triger for measuring time between pulses in channels                                164   Wed Jun 20 10:40:21 2012 Ivan Petrov triger for measuring time between pulses in channels                                165   Wed Jun 20 12:45:05 2012 Stefan Ritt triger for measuring time between pulses in channels                                166   Wed Jun 20 14:36:01 2012 Ivan Petrov triger for measuring time between pulses in channels                                167   Wed Jun 20 14:44:38 2012 Stefan Ritt triger for measuring time between pulses in channels                                168   Sat Jun 23 00:29:52 2012 Andrey Kuznetsov triger for measuring time between pulses in channels                                169   Mon Jun 25 14:21:13 2012 Stefan Ritt triger for measuring time between pulses in channels

Goto page Previous  1, 2, 3 ... 37, 38, 39, 40   Next

ELOG V3.1.4-80633ba