| ID |
Date |
Author |
Subject |
Text |
 |
|
436
|
Thu Jul 2 13:20:51 2015 |
Felix Bachmair | Creation of Object files | HI,
We are using the DRS4 Board in
the EUDAQ framework [1]. We wrote a a Producer |
|
|
437
|
Fri Jul 3 17:13:27 2015 |
Stefan Ritt | Creation of Object files | Hi Felix,
the distribution does not contain
any binaries, since there are too many Linux |
|
|
438
|
Mon Jul 6 11:30:56 2015 |
Felix Bachmair | Creation of Object files | Hi Stefan,
That's fine for me. I thought
it might be interesting for others as well.. |
|
|
439
|
Mon Jul 6 19:25:27 2015 |
Stefan Ritt | Creation of Object files | Anyhow it would be nice if you just post
your Makefile here, which runs with the standard
distribution, so people can use it if needed. |
|
|
440
|
Tue Jul 7 09:29:21 2015 |
Felix Bachmair | Creation of Object files | Yes of course no problem.
You can download via github https://github.com/veloxid/DRS4-v5-shared and |
|
|
4
|
Wed Feb 11 12:21:07 2009 |
Stefan Ritt | Corrected datasheet Rev. 0.8 | Please note the new datasheet Rev.
0.8 available from the DRS web site. It fixes
the label of pin #76, which was AGND but |
|
|
781
|
Wed Oct 23 17:56:26 2019 |
John Jendzurski | Computing corrected time from binary data...what is t_0,0? | In the equations for computing the corrected
time for channels other than channel 1, does
anyone know what the term t0,0 refers |
|
|
782
|
Fri Oct 25 16:39:07 2019 |
Stefan Ritt | Computing corrected time from binary data...what is t_0,0? | t0,0 refers to the time of cell #0 of channel
#0. So basically you keep channel 0 fixed,
calculate the difference of each channel's |
|
|
471
|
Tue Jan 12 17:57:03 2016 |
Jack Bargemann | Compiling DRS-exam | I am trying to compile drs-exam, but am
getting an error message I do not understand:
1>musbstd.obj |
|
|
472
|
Tue Jan 12 21:02:31 2016 |
Stefan Ritt | Compiling DRS-exam | I guess you are compiling under MS Windows
??? You probably don't link correctly
to the USB lib. Try to compile the examples |
|
|
386
|
Wed Oct 15 10:14:32 2014 |
Simon Weingarten | Clock settings in daisy chain DAQ | Hi,
I'm currently working on a little
DAQ system with four DRS evaluation boards. |
|
|
387
|
Wed Oct 15 10:52:58 2014 |
Stefan Ritt | Clock settings in daisy chain DAQ |
|
|
|
388
|
Wed Oct 15 11:34:43 2014 |
Simon Weingarten | Clock settings in daisy chain DAQ |
|
|
|
389
|
Wed Oct 15 12:15:58 2014 |
Stefan Ritt | Clock settings in daisy chain DAQ | Here is the full version
of the program with clock daisy-chaining.
Before switching to the external clock, it |
|
|
403
|
Fri Apr 17 10:07:38 2015 |
Simon Weingarten | Clock settings in daisy chain DAQ | Hi Stefan,
do you know how these numbers (400ps
and 60ps) scale with the sampling rate? The |
|
|
404
|
Mon Apr 20 13:08:24 2015 |
Stefan Ritt | Clock settings in daisy chain DAQ | The resolution coming from the sampling
rate goes into these numbers, but just marginally.
At 5 GSPS, you get a few ps reolution, while |
|
|
918
|
Thu May 8 23:23:19 2025 |
Jonathan Bradshaw | Clarification of full channel readout | Hi all
We're working on a new product
using the DRS4 IC, and want to do a full |
|
|
921
|
Fri May 9 08:26:17 2025 |
Stefan Ritt | Clarification of full channel readout | The full readout mode is not really recommended
since you have to pull out the stop position
separately. Just do the ROI readout using |
|
|
222
|
Wed Feb 27 13:47:32 2013 |
Georg Winner | Chip Test - Cell Error | When starting Chip Test in DRS Command
Line Interface, I receive the following message:
Cell error on channel 1, cell |
|
|
227
|
Wed Mar 6 13:08:03 2013 |
Stefan Ritt | Chip Test - Cell Error |
|
|