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    Reply  Wed Mar 21 09:33:00 2012, Martin Petriska, triger for measuring time between pulses in channels 

Stefan Ritt wrote:

Martin Petriska wrote:

 I have two BaF2 detectors with PMT connected to Ch1 and Ch2. At this time Im using external triger module to start DRS4. My evalution board is version 3 so I have no possibility to trigger on two or more pulses occurence on different channels. But I have this idea, trigger with analog trigger on channel 1 (start detector) will start measurement on all channels. After that using FPGA inside EVM to look if some value in Ch2 is bigger as treshold value for example 0,5V and if yes then send data by USB to PC, if signal in Ch2 is lower then restart measurement and wait on triger in Ch1. This way I want to eliminate false data transfer throw USB. Is this possible to implement it into DRS4 evaluation board firmware ?

Thanks.

It is muuuuch easier to upgrade to a V4 board!

Modification of firmware is not so easy. You have to learn and understand VHDL. Then, you have to add additional registers for this thresholds, which requires modification of the C library as well. The data inside the evaluation boards is not yet calibrated (this is only done on the C library), so you have an uncertainty of 30-40mV in this data. 

Ok, except this, I would have a question regarding to the new trigering posibility in V4 board. At this time, I am using Ztec ZT4612 which has some pattern triger posibility. Output from this card is used as an external trigger. Regarding this I have found a problem. Pulses from PMT have about 5-8 ns width. But I need to measure time diferences between pulses in range from 0-50ns. Problem is, that coincidence between pulses is working only on short pulse area (5-8ns) when they are overlapped. Additionaly the result histogram of time diferences is proportional to the pulse shapes. I solve this problem enabling 20MHz LPF filter in ZT4612, so the pulses are wider and overlaped on larger area. But, how it is with the V4 board? Will it trigger if I have for example one 5ns pulse on begiinning of CH1 and second pulse for example 50 ns later on Ch2 with the same probability when pulses are in the same time position?

    Reply  Wed Mar 21 09:39:33 2012, Stefan Ritt, triger for measuring time between pulses in channels 

Martin Petriska wrote:

Stefan Ritt wrote:

Martin Petriska wrote:

 I have two BaF2 detectors with PMT connected to Ch1 and Ch2. At this time Im using external triger module to start DRS4. My evalution board is version 3 so I have no possibility to trigger on two or more pulses occurence on different channels. But I have this idea, trigger with analog trigger on channel 1 (start detector) will start measurement on all channels. After that using FPGA inside EVM to look if some value in Ch2 is bigger as treshold value for example 0,5V and if yes then send data by USB to PC, if signal in Ch2 is lower then restart measurement and wait on triger in Ch1. This way I want to eliminate false data transfer throw USB. Is this possible to implement it into DRS4 evaluation board firmware ?

Thanks.

It is muuuuch easier to upgrade to a V4 board!

Modification of firmware is not so easy. You have to learn and understand VHDL. Then, you have to add additional registers for this thresholds, which requires modification of the C library as well. The data inside the evaluation boards is not yet calibrated (this is only done on the C library), so you have an uncertainty of 30-40mV in this data. 

Ok, except this, I would have a question regarding to the new trigering posibility in V4 board. At this time, I am using Ztec ZT4612 which has some pattern triger posibility. Output from this card is used as an external trigger. Regarding this I have found a problem. Pulses from PMT have about 5-8 ns width. But I need to measure time diferences between pulses in range from 0-50ns. Problem is, that coincidence between pulses is working only on short pulse area (5-8ns) when they are overlapped. Additionaly the result histogram of time diferences is proportional to the pulse shapes. I solve this problem enabling 20MHz LPF filter in ZT4612, so the pulses are wider and overlaped on larger area. But, how it is with the V4 board? Will it trigger if I have for example one 5ns pulse on begiinning of CH1 and second pulse for example 50 ns later on Ch2 with the same probability when pulses are in the same time position?

No. 

    Reply  Wed Jun 20 10:40:21 2012, Ivan Petrov, triger for measuring time between pulses in channels 

Stefan Ritt wrote:

Martin Petriska wrote:

Stefan Ritt wrote:

Martin Petriska wrote:

 I have two BaF2 detectors with PMT connected to Ch1 and Ch2. At this time Im using external triger module to start DRS4. My evalution board is version 3 so I have no possibility to trigger on two or more pulses occurence on different channels. But I have this idea, trigger with analog trigger on channel 1 (start detector) will start measurement on all channels. After that using FPGA inside EVM to look if some value in Ch2 is bigger as treshold value for example 0,5V and if yes then send data by USB to PC, if signal in Ch2 is lower then restart measurement and wait on triger in Ch1. This way I want to eliminate false data transfer throw USB. Is this possible to implement it into DRS4 evaluation board firmware ?

Thanks.

It is muuuuch easier to upgrade to a V4 board!

Modification of firmware is not so easy. You have to learn and understand VHDL. Then, you have to add additional registers for this thresholds, which requires modification of the C library as well. The data inside the evaluation boards is not yet calibrated (this is only done on the C library), so you have an uncertainty of 30-40mV in this data. 

Ok, except this, I would have a question regarding to the new trigering posibility in V4 board. At this time, I am using Ztec ZT4612 which has some pattern triger posibility. Output from this card is used as an external trigger. Regarding this I have found a problem. Pulses from PMT have about 5-8 ns width. But I need to measure time diferences between pulses in range from 0-50ns. Problem is, that coincidence between pulses is working only on short pulse area (5-8ns) when they are overlapped. Additionaly the result histogram of time diferences is proportional to the pulse shapes. I solve this problem enabling 20MHz LPF filter in ZT4612, so the pulses are wider and overlaped on larger area. But, how it is with the V4 board? Will it trigger if I have for example one 5ns pulse on begiinning of CH1 and second pulse for example 50 ns later on Ch2 with the same probability when pulses are in the same time position?

No. 

Hello. I need to digitize pulses from two PMT. After pulse on first PMT I have to save all pulses from second PMT in range 200 ns (and starting pulse from the first, and time range between pulse from 1st PMT and pulses from 2nd PMT). Is it possible with DRS evaluation board?

    Reply  Wed Jun 20 12:45:05 2012, Stefan Ritt, triger for measuring time between pulses in channels 

Ivan Petrov wrote:

 

Hello. I need to digitize pulses from two PMT. After pulse on first PMT I have to save all pulses from second PMT in range 200 ns (and starting pulse from the first, and time range between pulse from 1st PMT and pulses from 2nd PMT). Is it possible with DRS evaluation board?

If you run at 2 GSPS, you have a time window of 500 ns like on an oscilloscope. If you trigger on 1st PMT, you will get the traces of all 4 inputs for the next 500 ns. So I guess this is what you want. 

    Reply  Wed Jun 20 14:36:01 2012, Ivan Petrov, triger for measuring time between pulses in channels 

Stefan Ritt wrote:

Ivan Petrov wrote:

 

Hello. I need to digitize pulses from two PMT. After pulse on first PMT I have to save all pulses from second PMT in range 200 ns (and starting pulse from the first, and time range between pulse from 1st PMT and pulses from 2nd PMT). Is it possible with DRS evaluation board?

If you run at 2 GSPS, you have a time window of 500 ns like on an oscilloscope. If you trigger on 1st PMT, you will get the traces of all 4 inputs for the next 500 ns. So I guess this is what you want. 

 Ok. And, If I understand correctly, the main bottleneck in data readout is USB. I.e., theoretically maximum readout rate is 500 Hz. Is it true?

    Reply  Wed Jun 20 14:44:38 2012, Stefan Ritt, triger for measuring time between pulses in channels 

Ivan Petrov wrote:

Stefan Ritt wrote:

Ivan Petrov wrote:

 

Hello. I need to digitize pulses from two PMT. After pulse on first PMT I have to save all pulses from second PMT in range 200 ns (and starting pulse from the first, and time range between pulse from 1st PMT and pulses from 2nd PMT). Is it possible with DRS evaluation board?

If you run at 2 GSPS, you have a time window of 500 ns like on an oscilloscope. If you trigger on 1st PMT, you will get the traces of all 4 inputs for the next 500 ns. So I guess this is what you want. 

 Ok. And, If I understand correctly, the main bottleneck in data readout is USB. I.e., theoretically maximum readout rate is 500 Hz. Is it true?

On the evaluation board, yes. This board is not optimized for high readout rate. If you do your own electronics, like GBit Ethernet, you could be much faster. 

    Reply  Sat Jun 23 00:29:52 2012, Andrey Kuznetsov, triger for measuring time between pulses in channels 

Stefan Ritt wrote:

On the evaluation board, yes. This board is not optimized for high readout rate. If you do your own electronics, like GBit Ethernet, you could be much faster. 

 What is the readout rate via GBit Ethernet that you have achieved?

Where is the bottleneck in ethernet?

What is the proposed scheme by which the GBit Ethernet will be implemented, will the DRS4 Eval Board have to wait for the computer to respond before sending the data (wouldn't this make the readout much slower?), or will the DRS4 Eval Board keep sending the data to the computer?

    Reply  Mon Jun 25 14:21:13 2012, Stefan Ritt, triger for measuring time between pulses in channels 

Andrey Kuznetsov wrote:

Stefan Ritt wrote:

On the evaluation board, yes. This board is not optimized for high readout rate. If you do your own electronics, like GBit Ethernet, you could be much faster. 

 What is the readout rate via GBit Ethernet that you have achieved?

Where is the bottleneck in ethernet?

What is the proposed scheme by which the GBit Ethernet will be implemented, will the DRS4 Eval Board have to wait for the computer to respond before sending the data (wouldn't this make the readout much slower?), or will the DRS4 Eval Board keep sending the data to the computer?

With GBit Ethernet you get close to 100 MB/sec, which is the maximal line speed. The protocol to be implemented will achieve that rate. What one usually does is to send events in large blocks upon request from the PC. The trick is to do the request in a clever way, like using a high water mark on the receiving event buffer. So as long as the PC can digest the data quickly enough, the board just keeps sending, which means no overhead.

 

Entry  Mon Feb 29 13:33:06 2016, Dmitry Hits, two DRS4 boards configuration with 2048 samples each 

Dear Stefan,

I daisy-chained two boards (master sn#: 2514 - slave sn#: 2513) each with 2048 samples. However, when I use drsosc and put check mark in "configure multi-board daisy-chain" I see only 1024 samples. Namely, the first 1024 samples, the last part is missing. When I remove this check mark, I see all 2048 samples. Is there a simple software fix for this or is it a more involved firmware limitation? 

Other parameters: software version: 5.0.4, firmware version 21305, configured for 0.7 GSPS, display at 500 ns/div

Thank you,

Dmitry Hits.

    Reply  Mon Feb 29 14:09:21 2016, Stefan Ritt, two DRS4 boards configuration with 2048 samples each 

The multi-board mode has never been tested with 2048 samples, so is very likely not to work. I don't know yet how much work this will be to fix, but I'm on a business trip the next three weeks and probably will only have time to look at it when I return.

Stefan

Dmitry Hits wrote:

Dear Stefan,

I daisy-chained two boards (master sn#: 2514 - slave sn#: 2513) each with 2048 samples. However, when I use drsosc and put check mark in "configure multi-board daisy-chain" I see only 1024 samples. Namely, the first 1024 samples, the last part is missing. When I remove this check mark, I see all 2048 samples. Is there a simple software fix for this or is it a more involved firmware limitation? 

Other parameters: software version: 5.0.4, firmware version 21305, configured for 0.7 GSPS, display at 500 ns/div

Thank you,

Dmitry Hits.

 

    Reply  Mon May 2 14:31:28 2016, Dmitry Hits, two DRS4 boards configuration with 2048 samples each 

Hi Stefan

Any chance you have time to fix the software for multiboard configuration with 2048 samples each. I tried 5.0.5, but drsosc still shows only half of the waveform.

Dmitry

Stefan Ritt wrote:

The multi-board mode has never been tested with 2048 samples, so is very likely not to work. I don't know yet how much work this will be to fix, but I'm on a business trip the next three weeks and probably will only have time to look at it when I return.

Stefan

Dmitry Hits wrote:

Dear Stefan,

I daisy-chained two boards (master sn#: 2514 - slave sn#: 2513) each with 2048 samples. However, when I use drsosc and put check mark in "configure multi-board daisy-chain" I see only 1024 samples. Namely, the first 1024 samples, the last part is missing. When I remove this check mark, I see all 2048 samples. Is there a simple software fix for this or is it a more involved firmware limitation? 

Other parameters: software version: 5.0.4, firmware version 21305, configured for 0.7 GSPS, display at 500 ns/div

Thank you,

Dmitry Hits.

 

 

Entry  Wed Nov 22 08:31:03 2017, chen wenjun , using of the DRS Command Line Interface ΞΆΠΕΝΌΖ¬_20171122153834.png

Hello! I'm using DRS4 evaluation board V5 with the drs command line interface,but the mannal only explained the meaning of the command--"info".And I can't get the hang of the use of other commands through "help",so is there anywhere can I learn more about other commands?Or I can only learn it through the datasheet of DRS4 chip.

Thanks!

 

 

    Reply  Wed Nov 22 08:48:36 2017, Stefan Ritt, using of the DRS Command Line Interface 

The command line interface is more a debugging tool for experts, and you are not supposed to use it except to test the connection to the evaluation board. The programs for the user are the DRS Oscilloscope and the drs_exam.cpp example program to read out the board with your own program.

Stefan

chen wenjun wrote:

Hello! I'm using DRS4 evaluation board V5 with the drs command line interface,but the mannal only explained the meaning of the command--"info".And I can't get the hang of the use of other commands through "help",so is there anywhere can I learn more about other commands?Or I can only learn it through the datasheet of DRS4 chip.

Thanks!

 

 

 

    Reply  Wed Nov 22 08:58:33 2017, chen wenjun , using of the DRS Command Line Interface ΞΆΠΕΝΌΖ¬_20171122160245.png

OK!Thank you! One more question,when I use the Oscillocope ,I found that the actual speed is a constant value of 1.007G,how can change this speed.

Stefan Ritt wrote:

The command line interface is more a debugging tool for experts, and you are not supposed to use it except to test the connection to the evaluation board. The programs for the user are the DRS Oscilloscope and the drs_exam.cpp example program to read out the board with your own program.

Stefan

chen wenjun wrote:

Hello! I'm using DRS4 evaluation board V5 with the drs command line interface,but the mannal only explained the meaning of the command--"info".And I can't get the hang of the use of other commands through "help",so is there anywhere can I learn more about other commands?Or I can only learn it through the datasheet of DRS4 chip.

Thanks!

 

 

 

 

    Reply  Wed Nov 22 09:14:18 2017, Stefan Ritt, using of the DRS Command Line Interface 

Remove the check mark from the "Lock" box and enter a different value in the sampling speed box and hit return.

chen wenjun wrote:

OK!Thank you! One more question,when I use the Oscillocope ,I found that the actual speed is a constant value of 1.007G,how can change this speed.

Stefan Ritt wrote:

The command line interface is more a debugging tool for experts, and you are not supposed to use it except to test the connection to the evaluation board. The programs for the user are the DRS Oscilloscope and the drs_exam.cpp example program to read out the board with your own program.

Stefan

chen wenjun wrote:

Hello! I'm using DRS4 evaluation board V5 with the drs command line interface,but the mannal only explained the meaning of the command--"info".And I can't get the hang of the use of other commands through "help",so is there anywhere can I learn more about other commands?Or I can only learn it through the datasheet of DRS4 chip.

Thanks!

 

 

 

 

 

    Reply  Wed Nov 22 09:19:11 2017, chen wenjun , using of the DRS Command Line Interface 

Thank you very much !! All my fault for I thought it too comlicated. Thank you sincerely!

Stefan Ritt wrote:

Remove the check mark from the "Lock" box and enter a different value in the sampling speed box and hit return.

chen wenjun wrote:

OK!Thank you! One more question,when I use the Oscillocope ,I found that the actual speed is a constant value of 1.007G,how can change this speed.

Stefan Ritt wrote:

The command line interface is more a debugging tool for experts, and you are not supposed to use it except to test the connection to the evaluation board. The programs for the user are the DRS Oscilloscope and the drs_exam.cpp example program to read out the board with your own program.

Stefan

chen wenjun wrote:

Hello! I'm using DRS4 evaluation board V5 with the drs command line interface,but the mannal only explained the meaning of the command--"info".And I can't get the hang of the use of other commands through "help",so is there anywhere can I learn more about other commands?Or I can only learn it through the datasheet of DRS4 chip.

Thanks!

 

 

 

 

 

 

Entry  Thu Jan 9 10:58:19 2014, Martin Petriska, v5 software with v4 board calibration 

 Hi

Question:

In v4 board, which channel has best calibration ?

Should it be possible to simulate v5 board and read calibration values for v4 board by other method .. for example using external calibration signal source connected to all channels? 

Is it  needed to detach all input signals from EVM board during calibration ?( I see there are switches on channel inputs.)

Some comments: averager.h, averager.cpp are missing in windows v.5 sources (it should be copied from linux sources)

 

PF2014 and thank You for development new EVM 5 and new time precision.

 

Martin

    Reply  Thu Jan 9 11:02:46 2014, Stefan Ritt, v5 software with v4 board calibration 

Martin Petriska wrote:

 Hi

Question:

In v4 board, which channel has best calibration ?

Should it be possible to simulate v5 board and read calibration values for v4 board by other method .. for example using external calibration signal source connected to all channels? 

Is it  needed to detach all input signals from EVM board during calibration ?( I see there are switches on channel inputs.)

Some comments: averager.h, averager.cpp are missing in windows v.5 sources (it should be copied from linux sources)

 

PF2014 and thank You for development new EVM 5 and new time precision.

 

Martin

In v4 board, actually no channel has a good calibration. The timing calibration is done with channel #9, which is hard connected to a (poor) clock. So the best you can get there is ~30 ps. In principle one can calibrate the V4 board with an external source. The problem there is to find a good sine wave oscillator (we have several expensive ones and only one was good enough), and that the software does not support this. You would have to write your own calibration code (where of course you can "recycle" the one from the V5 software.

Thanks for pointing out the missing averager.*, I will add it.

/Stefan

Entry  Thu Dec 27 00:12:12 2012, Jinhong Wang, variation of sampling capacitors 

Hi Stefan,

A quick question, what is the typical variation of the sampling capacitors in DRS4?  Will this variation be significant to affect your sampling result?

 Best,

Jinhong

    Reply  Thu Dec 27 09:49:17 2012, Stefan Ritt, variation of sampling capacitors 

Jinhong Wang wrote:

Hi Stefan,

A quick question, what is the typical variation of the sampling capacitors in DRS4?  Will this variation be significant to affect your sampling result?

 Best,

Jinhong 

The capacitors sample the input voltage, not the charge, so the actual size of the capacitors does not matter on first order (the variations might be in the order of 5%). A bigger effect is the variation of the analog switches in the front of the capacitors, which is about 15%. So the actual bandwidth each cell sees varies by maybe 20% (given by the R and the C), but this comes only into play when sampling steep edges.

Stefan

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