| ID  | Date | Author | Subject | Text |  | 
| 786 | Fri May 22 12:53:33 2020 | Stefan Ritt | DRS4 Evaluation board control tool 'drscl' with macro file | There is an example program in the distribution under software/drscl/drs_exam.cpp which is
 a stand-alone program to do what you need.
 |  | 
| 785 | Thu May 21 07:38:05 2020 | Keita Mizukoshi | Type check at DOFrame.h in official software | Hi, 
 
 
 I've failured to compile official
 |  | 
| 784 | Thu May 21 07:18:48 2020 | Keita Mizukoshi | DRS4 Evaluation board control tool 'drscl' with macro file | Dear experts, 
 
 
 I would like to use DRS4 evaluation
 |  | 
| 783 | Mon Mar 23 15:03:28 2020 | Ajay Krishnamurthy | USB trigger issue | Hello, 
 I had forgotten to disable the
 turn off the power to the USB drive on Windows
 |  | 
| 782 | Fri Oct 25 16:39:07 2019 | Stefan Ritt | Computing corrected time from binary data...what is t_0,0? | t0,0 refers to the time of cell #0 of channel #0. So basically you keep channel 0 fixed,
 calculate the difference of each channel's
 |  | 
| 781 | Wed Oct 23 17:56:26 2019 | John Jendzurski | Computing corrected time from binary data...what is t_0,0? | In the equations for computing the corrected time for channels other than channel 1, does
 anyone know what the term t0,0 refers
 |   | 
| 780 | Tue Oct 15 08:14:17 2019 | Danyang | how to acquire the stop position with channel cascading | Thanks a lot. The problem is solved when A3-A0 is set 1101 and srclk keeps low.
 
 Best Regards,
 |  | 
| 779 | Mon Oct 14 15:27:09 2019 | Stefan Ritt | how to acquire the stop position with channel cascading | If you configure the Write Shift Register with 01010101b, then all you have to do after
 a trigger is to set A3-A0 to 1101. The WSROUT
 |  | 
| 778 | Mon Oct 14 13:44:26 2019 | Danyang | how to acquire the stop position with channel cascading | Yes, firstly I configured the chip with 4x2048 bins by setting the Write Shift
 Register to 01010101b, A3-A0
 |  | 
| 777 | Mon Oct 14 12:56:13 2019 | Stefan Ritt | how to acquire the stop position with channel cascading | Note that you have to read out the Write Shift Register only if you do channel cascading,
 e.g. configuring the chip with 4x2048 bins
 |  | 
| 776 | Mon Oct 14 11:45:06 2019 | Danyang | how to acquire the stop position with channel cascading | I tried the logic in my designed board.  The results
 are shown in the picture: Srout keeps low
 |   | 
| 775 | Mon Oct 14 10:14:46 2019 | Stefan Ritt | how to acquire the stop position with channel cascading | You first set A3-A0, on the next clock cycle you issue pulses on srclk, and about
 10ns after each clock pulse the output shows
 |  | 
| 774 | Mon Oct 14 09:32:33 2019 | Danyang | how to acquire the stop position with channel cascading | Hi Steffan, 
 In DSR4
 DATASHEET Rev.0.9 Page13,  there is
 |   | 
| 773 | Fri Sep 13 15:27:41 2019 | Arseny Rybnikov | Scaler / How to modify the firmware to change the scaler integration time | Hello, 
 We want to use the inner DRS4 counter(scaler)
 within more than the 100ms integration
 |  | 
| 772 | Tue Aug 27 09:14:03 2019 | Stefan Ritt | DRS4 | Is a 5 GSPS oscilloscope suitable for use with Silicon surface barier detectors?
 
 
 |  | 
| 771 | Tue Aug 27 08:33:22 2019 | chinmay basu | DRS4 | Is DRS4 suitable for use with Silicon surface barrier detectors?
 |  | 
| 770 | Tue Aug 20 16:05:21 2019 | Bill Ashmanskas | should one deassert DENABLE while writing the write-shift register? | Aha -- many thanks.  I think what tripped up my test logic is that the "done"
 state in drs4_eval5_app.vhd that executes
 |  | 
| 769 | Tue Aug 20 10:44:45 2019 | Stefan Ritt | should one deassert DENABLE while writing the write-shift register? | Hi Bill, 
 you keep DENABLE active all the
 time to keep the Domino Wave running, but
 |  | 
| 768 | Mon Aug 19 23:01:22 2019 | Bill Ashmanskas | should one deassert DENABLE while writing the write-shift register? | Hi Stefan, 
 We have for some time now been
 using custom firmware on a custom board to
 |  | 
| 767 | Sat Jul 20 12:28:14 2019 | Stefan Ritt | Trace Impedance | The DRS4 input is high impedance. So if you like you can terminate it with 100 Ohm
 differentially and route it with 100 Ohm.
 |  |