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Entry  Wed Dec 23 15:38:14 2015, mony orbach, Dtap stops toggling after 40msec 
    Reply  Wed Dec 23 15:48:42 2015, Stefan Ritt, Dtap stops toggling after 40msec 
       Reply  Thu Dec 24 10:51:31 2015, mony orbach, Dtap stops toggling after 40msec 
          Reply  Thu Dec 24 12:45:41 2015, Stefan Ritt, Dtap stops toggling after 40msec 
             Reply  Sun Dec 27 15:41:32 2015, mony orbach, Dtap stops toggling after 40msec Dtap-Denable.gifdtap-Danable2.gifDtap-refck.gifDtap-Dspeed.gif
                Reply  Mon Dec 28 11:05:15 2015, Stefan Ritt, Dtap stops toggling after 40msec 
                   Reply  Mon Dec 28 11:21:54 2015, mony orbach, Dtap stops toggling after 40msec 
                      Reply  Wed Dec 30 16:25:35 2015, mony orbach, Dtap stops toggling after 40msec 
                         Reply  Wed Dec 30 17:00:00 2015, Stefan Ritt, Dtap stops toggling after 40msec 
                            Reply  Thu Jan 14 14:00:26 2016, mony orbach, Dtap stops toggling after 40msec 
                               Reply  Thu Jan 14 14:11:06 2016, Stefan Ritt, Dtap stops toggling after 40msec 
Message ID: 462     Entry time: Sun Dec 27 15:41:32 2015     In reply to: 460     Reply to this: 463
Author: mony orbach 
Subject: Dtap stops toggling after 40msec 

Hi

We have some measures to show (attached)

  1. Dtap and Denable
  2. Dtap+Denable in zoom
  3. Dtap + Refck+
  4. Dtap + Dspeed

From the screen shots it can be seen that refck+ is not synchronized with Dtap (PLL not working correctly)

And Dspeed is going done to zero after some time.

In our system Dspeed is shorted to pllout.

So it looks like pllout do not pump the RC filter capacitors.

We tested various value of R and C's.

Also we checked that pllout is sorted to Dspeed.

 

Thanks, mony

 

 

 

Stefan Ritt wrote:

I want to see the trace on the scope for the DTAP, the REFCLK, the DENABLE and the DWRITE.

Probably (but it's just a guess), you have a problem with the soldering of the DRS chip, maybe to the PLL loop filter. Or you chose the wrong capacitor/resistor combination for the loop filter. There are ~10 other groupsl who did the same and it works for all of them, so there must be a problem on your side.

 

Stefan

 

mony orbach wrote:

my refclk is 1.25Mhz

what are the inputs and voltage you need to see?

Avdd and Dvdd are 2.5v

Denable is "1" Dwrite "0"

currently i am doing an external reset cycle, after that i am doing the configuration cycle.

should i relay on the internal reset?

the Dtap is toggling for 33.8msec and then just stops.

 

Thanks, Mony 

Stefan Ritt wrote:

No idea what you do wrong. I need to see oscilloscope traces for all your inputs and voltages. What is your REFCLK input?

mony orbach wrote:

Hi

the drs4 start to generate Dtap signal after reset and standard configuration.

while in reset Denable and  Dwrite are low

after reset we put Denable in high

the Dtap starts to toggle, and the plllck stabilizes on about 1V.  

After 40Msec the Dtap stops to toggle and the plllck go to 2.5V

Why do the Domino stop working?

 

Thanks, Mony

 

 

 

 

Attachment 1: Dtap-Denable.gif  32 kB  | Hide | Hide all
Dtap-Denable.gif
Attachment 2: dtap-Danable2.gif  29 kB  | Hide | Hide all
dtap-Danable2.gif
Attachment 3: Dtap-refck.gif  29 kB  | Hide | Hide all
Dtap-refck.gif
Attachment 4: Dtap-Dspeed.gif  40 kB  | Hide | Hide all
Dtap-Dspeed.gif
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