|
|
|
DRS4 Forum
|
| DRS4 Discussion Forum |
Not logged in |
 |
|
|
 Fri Feb 26 17:05:26 2021, Tom Schneider, Trouble getting PLL to lock
|
 Fri Feb 26 17:59:14 2021, Stefan Ritt, Trouble getting PLL to lock
| |
Fri Feb 26 18:33:52 2021, Tom Schneider, Trouble getting PLL to lock
| |
Fri Feb 26 20:32:25 2021, Stefan Ritt, Trouble getting PLL to lock
| |
Fri Feb 26 21:24:39 2021, Tom Schneider, Trouble getting PLL to lock
| |
Fri Feb 26 22:12:58 2021, Stefan Ritt, Trouble getting PLL to lock
| |
Fri Feb 26 22:52:13 2021, Tom Schneider, Trouble getting PLL to lock
| |
Thu Mar 4 21:36:14 2021, Tom Schneider, Trouble getting PLL to lock
| |
Fri Mar 5 09:39:42 2021, Stefan Ritt, Trouble getting PLL to lock
| |
Fri Dec 24 03:13:32 2021, Lynsey, Trouble getting PLL to lock
|
|
|
Message ID: 817
Entry time: Fri Feb 26 22:52:13 2021
In reply to: 816
Reply to this: 818
|
| Author: |
Tom Schneider |
| Subject: |
Trouble getting PLL to lock |
|
|
Thats not a simple modification to my PCB, but I'll give it a try. Thanks for your help
| Stefan Ritt wrote: |
|
Sounds to me like your REFCLK is not getting through or your PLL loop is open. Could be a bad solder connection. Try to measure signals not on the PCB trace, but directly on the DRS4 pins. Drive REFCLK with a proper LVDS signal. Maybe it's wrong what I wrote in the data sheet and the trick with VDD/2 is not really working.
Stefan
|
|