I found the problem, and it had nothing to do with the CMOS clock input. As it turns out, even though I was using the default state of the config register, I still had to write to it after powerup. Once I did that, the PLL locked immediately.
-Tom
| Tom Schneider wrote: |
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Thats not a simple modification to my PCB, but I'll give it a try. Thanks for your help
| Stefan Ritt wrote: |
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Sounds to me like your REFCLK is not getting through or your PLL loop is open. Could be a bad solder connection. Try to measure signals not on the PCB trace, but directly on the DRS4 pins. Drive REFCLK with a proper LVDS signal. Maybe it's wrong what I wrote in the data sheet and the trick with VDD/2 is not really working.
Stefan
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