 Wed Jun 26 13:08:42 2019, Stefan Ritt, drs_exam is always reading out a sin wave
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Sure, that’s correct. The example program turns on the internal sine wave generator in case people don’t have a real signal. That’s
why it’s called „example“. Find the code which turns on the generator and change it. You will also have to change the trigger settings
depending on your actual signal. |
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Mon Jul 8 14:29:12 2019, Stefan Ritt, drs_exam is always reading out a sin wave
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Actually in the original drs_exam.cpp the sine wave oscillator is turned off with this command
/* use following line to turn on the internal 100 MHz clock connected to all channels */
//b->EnableTcal(1); |
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Mon Jul 15 17:26:50 2019, Stefan Ritt, Evaluation Board Test Functionality
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Have you set the trigger correctly to the channel with your signal, polarity and level? Do you undersand the difference between normal and auto trigger?
Why don't you post a screendump. Are you ABSOLUTELY SURE that you have a signal on your cable? Have you tried with another oscilloscope? Are you sure
that your SMA connector is good? |
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Thu Jul 18 11:37:56 2019, Stefan Ritt, Trace Impedance
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The requiremnet is the same as for any high speed analog board, there is othing special with the DRS4. If you want to terminate your line with 50 Ohms
and you want a matched impedance layout, you route all lines with 50 Ohms impedance. Truth is however that nothing is perfect. The SMA connector is not
exactly 50 Ohm, the PCB gets a 10-20% variation depending on the manufacturer. So even if you try hard, you will never have a 50 Ohm matched impedance. |
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Sat Jul 20 12:28:14 2019, Stefan Ritt, Trace Impedance
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The DRS4 input is high impedance. So if you like you can terminate it with 100 Ohm differentially and route it with 100 Ohm. But if you keep the lines
short, the reflection is negligible. That’s what we made on the evaluation board.
Ismael |
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Tue Aug 20 10:44:45 2019, Stefan Ritt, should one deassert DENABLE while writing the write-shift register?
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Hi Bill,
you keep DENABLE active all the time to keep the Domino Wave running, but you deassert DWRITE if you change any register via SRCLK. There is
no shadow register, just a simple shift register, but with DWRITE being low, the domino circuitry does not touch it. |
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Tue Aug 27 09:14:03 2019, Stefan Ritt, DRS4
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Is a 5 GSPS oscilloscope suitable for use with Silicon surface barier detectors?
chinmay
basu wrote:
Is DRS4 suitable for use with Silicon surface barrier detectors? |
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Mon Oct 14 10:14:46 2019, Stefan Ritt, how to acquire the stop position with channel cascading
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You first set A3-A0, on the next clock cycle you issue pulses on srclk, and about 10ns after each clock pulse the output shows up at srout. Best is to
verity this with an oscilloscope.
The radout of the shift register is independent of the readout mode, so you can use with with MUXOUT as well. |
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Mon Oct 14 12:56:13 2019, Stefan Ritt, how to acquire the stop position with channel cascading
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Note that you have to read out the Write Shift Register only if you do channel cascading, e.g. configuring the chip with 4x2048 bins by setting the Write
Shift Register to 01010101b. Then the Write Shift Register tells you in which 1024-bin segment the Domino Wave has been stopped. If you use the normal
8x1024 bin mode, you don't have to read out the Write Shift Register since it continas only 1's. |
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Mon Oct 14 15:27:09 2019, Stefan Ritt, how to acquire the stop position with channel cascading
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If you configure the Write Shift Register with 01010101b, then all you have to do after a trigger is to set A3-A0 to 1101. The WSROUT pin shows you then
either ther state 01010101b or 10101010b, you the pin should be 1 or 0, and that's all you need. The Write Shift Register is NOT routed to the SROUT
pin, you only see it at the WSROUT pin. |
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Fri Oct 25 16:39:07 2019, Stefan Ritt, Computing corrected time from binary data...what is t_0,0?
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t0,0 refers to the time of cell #0 of channel #0. So basically you keep channel 0 fixed, calculate the difference of each channel's cell #0 in respect
to channel 0, and align all channels except channel 0 so that their cell #0 has the same value. There is an inconsistency between the channel numbering.
The formula uses 0...3 and the manual says "channel 1" but it means actually the first channel, which uses index "0". |
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Fri May 22 12:53:33 2020, Stefan Ritt, DRS4 Evaluation board control tool 'drscl' with macro file
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There is an example program in the distribution under software/drscl/drs_exam.cpp which is a stand-alone program to do what you need. It uses the C library
coming with the distribution. It configureres the board, defines a trigger, and then writes a few waveforms into a file. You can use it as a starting point
for your development. If you need any other language, you have to develop bindings to the C library. |
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Fri May 22 13:24:51 2020, Stefan Ritt, Type check at DOFrame.h in official software
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The software is a bit outdated, I will soon make a new release.
In meantime, you can replace that like with
bool GetRefclk(int board) { return m_refClk[board]; } |
Tue May 26 12:44:16 2020, Stefan Ritt, Domino wave 
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Look at the attached picture. For simplicity, only 4 cells are open and tracking the input signal. Time is flowing from top to bottom. So initially,
a train of 4 cells is open. When it's stopped, the train stops not immediately, but kind of "runs against a wall" at the stop cell. So each
cell is open for four time ticks effectively, and you can use all 1024 cells. |
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Mon Aug 31 10:52:42 2020, Stefan Ritt, Dynamic Range Evaluation Board and Software
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You cannot go below -0.5V for the inputs, since the board does not have an internal negative power supply, which would be necessary for that. If you
have -0.8V pulses, the easiest is to use a passive inverter at the input to convert it to a 0.8V pulse.
Stefan |
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Mon Aug 31 17:17:30 2020, Stefan Ritt, Channel Cascading
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If you have a board with cascading option, it should show the "combined" option in the 2048-bin option enabled (not grayed), as in the
attached screen shot. If the 2048-bin option is all greyed out, the system does not recognize the cascading option. If your board has a sticker "2048
bin" and you still see the 2048-bin option greyed out, it might mean that a resistor on that board has been forgotten. If you do not see the "2048 |
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Wed Oct 7 10:56:03 2020, Stefan Ritt, External triggering
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The trigger is there only to trigger the chip, but cannot be used as a precise time reference. If you want to measure precise timing, do this always
BETWEEN two inputs, never between an input and the trigger. You might want to split and delay your trigger signal and feed one copy to another input of
the evaluation board as your reference. |
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Tue Oct 27 13:37:23 2020, Stefan Ritt, Timing diagram of SROUT/SRIN signal to write/read a write shift register
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Dear Seiya,
1) That's correct. SRIN is ampled at the falling edge. Pleae make sure to obey the hold-time as written in the datasheet. P.12, Fig. 11:
SRIN must be stable before the falling edge of SRCLK and tH after the falling clock. tH is 5ns according to table 1. |
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Tue Oct 27 15:24:38 2020, Stefan Ritt, Timing diagram of SROUT/SRIN signal to write/read a write shift register
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This is a static shift register, so you can make the clock as slow as you want. Actually I don't use a "clock", I just use a data pin I
control via a state machine in the VHDL code. This way I have more control over the edges. I need several (internal) clock cycles to produce one SRCLK
clock cycle, but that does not matter for the DRS. |
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Thu Dec 17 11:31:34 2020, Stefan Ritt, drs sources on github?
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Not github, but bitbucket: https://bitbucket.org/ritt/drs4eb/src/master/
But development kind of stalled, so there will be updates only in case of severe bugs, which are kind of gone after 10 years now.
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