 Wed Jan 30 08:02:25 2019, Stefan Ritt, DRS4 domino wave stability study
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The Domino wave is most stable at 5 GSPS, slowly degrades down to 3-2 GSPS, and at 1GSPS gets some significant jitter. This is for internal reasons in
the chip and cannot be compensated by the loop filter. It is therefore important to run it as fast as possible if you want to achieve best timing resolution.
As a rule of thumb, the jitter at 5 GSPS is about 20-25 ps, and at 1 GSPS it is maybe 150 ps. If you require good timing resolution, you can use the 9th |
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Wed Jan 30 17:08:58 2019, Stefan Ritt, ROOT Macro for data acquired with the newest software
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This one elog:361 should still work.
Stefan
Abaz |
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Sat Feb 2 10:10:22 2019, Stefan Ritt, Saving Rate (only 15Acq/s)
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The reduction of rate is because you save in XML format, which is an ASCII format, so human readable, but takes long to write. If you switch to binary
format and write on a decent fast hard disk, you should get back to 450 Acq/s.
Stefan |
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Mon Feb 4 16:46:04 2019, Stefan Ritt, Different Distances between the sampling points
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The sampling points are NOT equidestant, they have varying bin widths of 150ps to 250ps at 5GS/s. That's due the way the DRS4 chip works. You might
have neglected that fact in the past, but that would have led to poor timing resolutions (typically 1-2ns resolution only). To get bins with the same width,
you have to treat your waveform as a real X/Y points (or better U/T), and the re-sample that cure, maybe spline-interpolated, at 200ps bins. |
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Mon Feb 4 18:18:22 2019, Stefan Ritt, Different Distances between the sampling points
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elog:361
Hans
Steiger wrote:
Sorry.... but is there a solution or a Root Macro, that reads the |
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Wed Feb 20 08:08:42 2019, Stefan Ritt, meg?
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You have to change the path to libusb-1.0.lib to the one where you installed it.
Stefan
Lev |
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Wed Feb 20 12:56:56 2019, Stefan Ritt, meg?
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No idea. Maye some access problem. Have you tried to start your program under an admin account?
Stefan
Lev |
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Thu Feb 21 09:57:53 2019, Stefan Ritt, no board found
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Could be. Have you tried that elog:657
Stefan
Lev |
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Mon Feb 25 08:48:27 2019, Stefan Ritt, no board found
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"dynamic" or "static" does not matter, as long as you don't use your program on another computer. I have no more idea about the
"no board found" problem. It works ok on all computers I tried at our lab.
Stefan |
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Fri Apr 12 09:55:50 2019, Stefan Ritt, multi-board
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Subtract 16 ns from your measured value ;-)
Stefan
Lev |
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Fri Apr 12 12:50:18 2019, Stefan Ritt, multi-board
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If you have two signal going through two cables, the cable have never the same length (on a scale of picoseconds), and you have to calibrate that anyway.
So a proper timing calibration is not a crutch.
What do you mean by "manual 50ps"? The manual does not mention any resolution. In my experience, you can achieve about 10ps between |
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Fri Jun 21 12:54:47 2019, Stefan Ritt, Evaluation firmware wait_vdd state
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Dear Andrew,
the posting you mention is still accurate. Any power supply will drop when you start the Domino wave, no matter how big your capacitor is. Unfortunately
the output signal of the DRS4 scales with VDD. So if your VDD drops by 40 mV and you get a trigger and you immediately start the readout, the output baseline |
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Wed Jun 26 13:08:42 2019, Stefan Ritt, drs_exam is always reading out a sin wave
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Sure, that’s correct. The example program turns on the internal sine wave generator in case people don’t have a real signal. That’s
why it’s called „example“. Find the code which turns on the generator and change it. You will also have to change the trigger settings
depending on your actual signal. |
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Mon Jul 8 14:29:12 2019, Stefan Ritt, drs_exam is always reading out a sin wave
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Actually in the original drs_exam.cpp the sine wave oscillator is turned off with this command
/* use following line to turn on the internal 100 MHz clock connected to all channels */
//b->EnableTcal(1); |
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Mon Jul 15 17:26:50 2019, Stefan Ritt, Evaluation Board Test Functionality
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Have you set the trigger correctly to the channel with your signal, polarity and level? Do you undersand the difference between normal and auto trigger?
Why don't you post a screendump. Are you ABSOLUTELY SURE that you have a signal on your cable? Have you tried with another oscilloscope? Are you sure
that your SMA connector is good? |
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Thu Jul 18 11:37:56 2019, Stefan Ritt, Trace Impedance
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The requiremnet is the same as for any high speed analog board, there is othing special with the DRS4. If you want to terminate your line with 50 Ohms
and you want a matched impedance layout, you route all lines with 50 Ohms impedance. Truth is however that nothing is perfect. The SMA connector is not
exactly 50 Ohm, the PCB gets a 10-20% variation depending on the manufacturer. So even if you try hard, you will never have a 50 Ohm matched impedance. |
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Sat Jul 20 12:28:14 2019, Stefan Ritt, Trace Impedance
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The DRS4 input is high impedance. So if you like you can terminate it with 100 Ohm differentially and route it with 100 Ohm. But if you keep the lines
short, the reflection is negligible. That’s what we made on the evaluation board.
Ismael |
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Tue Aug 20 10:44:45 2019, Stefan Ritt, should one deassert DENABLE while writing the write-shift register?
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Hi Bill,
you keep DENABLE active all the time to keep the Domino Wave running, but you deassert DWRITE if you change any register via SRCLK. There is
no shadow register, just a simple shift register, but with DWRITE being low, the domino circuitry does not touch it. |
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Tue Aug 27 09:14:03 2019, Stefan Ritt, DRS4
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Is a 5 GSPS oscilloscope suitable for use with Silicon surface barier detectors?
chinmay
basu wrote:
Is DRS4 suitable for use with Silicon surface barrier detectors? |
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Mon Oct 14 10:14:46 2019, Stefan Ritt, how to acquire the stop position with channel cascading
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You first set A3-A0, on the next clock cycle you issue pulses on srclk, and about 10ns after each clock pulse the output shows up at srout. Best is to
verity this with an oscilloscope.
The radout of the shift register is independent of the readout mode, so you can use with with MUXOUT as well. |