Sat Feb 4 11:59:26 2012, Zhongwei Du, what sort of detectors for physical experiment the DRS4 used?
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Hello.
We are designing a waveform sampling board for Si strip array detector ,whose rise time is less than 10 ns, which makes we doubt whether the
DRS4 can do more accurate than traditional charge integral circuit for charge measuring. |
Tue Dec 4 09:24:22 2012, Zhongwei Du, Question of drs4 using
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When Denable and Dwrite is high , the voltage of PLLOUT is 0 V. And the Dtap is turn high with no delay when the Denable turns high.
After power up and configuration(the WSR,WCR,CR are all set to 11111111), the readout data is no change whenever the input analog signal and rofs,bias,oofs
changes. I have test useing the DAC to supply the Dspeed voltage, and change a new DRS4 chip, but all is the same. The readout data is strange : the first |
Tue Dec 4 09:50:11 2012, Zhongwei Du, Question of drs4 using
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Stefan Ritt wrote:
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Wed Dec 30 14:28:33 2009, aliyilmaz, normal_mode_in_drs_exam.cpp
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Dear Mr. S. Ritt
i am Ms. student , am working with your DRS4 board to calculate the time of flight of the cosmic particle which passes
trough the hodoscope . i see the signals at scope , which is negative (i don't want to take positive side of the signal). |
Tue Jul 23 22:31:08 2013, alonzi, Evaluation Board Behavior
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Working with the DRS evaluation board we noticed some funny behavior: See attatchment 1. In about 1% of scope traces we see the first and last bin take
on a value substantially different from the baseline, note the small spikes on the end of the traces. These spikes occur across all channels and either
appear in all channels or in none. Attachment two shows what several thousand scope traces look like. You can clearly see that some of the traces are offset |
Tue Jul 23 22:42:31 2013, alonzi, Evaluation Board Behavior
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Stefan Ritt wrote:
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Mon Aug 29 09:36:34 2016, benjamin legeyt, increment write config register on the fly?
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Hello,
I have a question about using the write config register to enable/disable sampling on the fly. I am looking to instrument an experiment
at EPFL where multiple short events need to be captured during a 20us period followed by an 80us quiet period during which we could read out the chip. |
Mon Aug 29 12:18:49 2016, benjamin legeyt, increment write config register on the fly?
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If I may trouble you for a little more information, the critical point then is that there should not be any zeroes in the write config register
while the sampling is active? In case it was unclear I would only be reading out once sampling was stopped (dwrite = 0).
As for the readout, I know that I would have to read out all 1024 samples each time, and keep track of where each channel stopped in the FPGA. |
Thu Jan 25 05:24:05 2018, chen wenjun, problem with the drscl(drs507)
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Hi! Stefan:
when I change a new computer(win7,64bit),I meet a problem that the drscl app cannot found the board! It shows"USB successfully scanned,but
no boards found",but the drsosc runs well . when I connect to other win7*64bits computer,only one of them runs property! Is there any driver else |
Thu Jan 25 06:10:52 2018, chen wenjun, drscl doesn't find eval board but drsosc does (Windows 7)
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Hi! Jim:
It seems that I meet the same question with you ,and I am confused ,have you find out the reason about this problem?Or can you tell me
how you deal with it? |
Thu Jan 25 08:07:32 2018, chen wenjun, problem with the drscl(drs507)
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I have tried about 4 computers,only one worked fine.I truly want to know how others get this fixed,can you get in touch with them?
Stefan
Ritt wrote:
This problem has been reported by several people, like |
Wed Mar 14 09:13:39 2018, chen wenjun, confusion about the description in drs.cpp
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Hi,Stefan:
recently,whtn I study the drs.cpp code ,I found that the buffer[1] is char but the addr and the base_addr are all unsigned int,isn't
there any problem that the addr may be cut off to 8 bits? Also ,I found that the data fpga recieved from the usb is 16 bits,so how can fpga get the true |
Sun May 6 08:13:37 2018, chen wenjun, confusion about the description in drs.cpp
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Hi Stefan:
I'm still confused that althought the 8 bits buffer is enough,the FPGA receive the command through the uc_data_i register which is
16 bits wides.As we can see in the firmware, the locbus_addr is 32 bits wides. Does it means the locbus_addr[31:8] are always '0' because the address |
Wed Nov 22 08:31:03 2017, chen wenjun , using of the DRS Command Line Interface
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Hello! I'm using DRS4 evaluation board V5 with the drs command line interface,but the mannal only explained the meaning of the command--"info".And
I can't get the hang of the use of other commands through "help",so is there anywhere can I learn more about other commands?Or I can only
learn it through the datasheet of DRS4 chip. |
Wed Nov 22 08:58:33 2017, chen wenjun , using of the DRS Command Line Interface
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OK!Thank you! One more question,when I use the Oscillocope ,I found that the actual speed is a constant value of 1.007G,how can change this speed.
Stefan
Ritt wrote:
The command line interface is more a debugging tool for experts, and |
Wed Nov 22 09:19:11 2017, chen wenjun , using of the DRS Command Line Interface
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Thank you very much !! All my fault for I thought it too comlicated. Thank you sincerely!
Stefan
Ritt wrote:
Remove the check mark from the "Lock" box and enter a different |
Tue Aug 27 08:33:22 2019, chinmay basu, DRS4
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Is DRS4 suitable for use with Silicon surface barrier detectors? |
Fri Aug 7 18:41:37 2015, dante, DRS4
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Hi
I have just installed DRS4, but when I try to view it from the USB it don't work. Why?
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Thu Nov 1 20:08:33 2012, hongwei yang, DRS4 firmware
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Hi,
We are using drs4 board, but oscilloscope app will somehow stop to work if we config trigger into "or and", When I
look into the drs4 firmware file drs4_eval3_app.vhd, I couldn't find the trigger_config value assignment which is mentioned at(#7 offset 0x1E from 31 downto |
Thu Nov 1 20:21:44 2012, hongwei yang, DRS4 firmware
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Stefan Ritt wrote:
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