 Thu Mar 11 11:45:52 2010, Stefan Ritt, Readout of DRS Data
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Hao Huan wrote:
Hi Stefan, |
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Fri Mar 12 08:04:44 2010, Stefan Ritt, Input Bandwidth of the DRS Chip
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Hao Huan wrote:
I read in the DRS datasheet that the input bandwidth if 950MHz. However, it also says the output bandwidth |
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Thu Mar 18 22:10:41 2010, Stefan Ritt, Serial Interface Frequency of the DRS Chip
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Hao Huan wrote:
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Mon Mar 22 09:12:19 2010, Stefan Ritt, PLL Loop Filter Configuration
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Hao Huan wrote:
in the datasheet it says at 6GSPS the typical loop filter parameters are 220Ω, 2.2nF and 27nF. |
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Tue Apr 13 13:12:43 2010, Stefan Ritt, evaluation board used like a counter
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lorenzo neri wrote:
Hi all |
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Tue Apr 13 13:56:07 2010, Stefan Ritt, Baseline Variation In Data
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Hao Huan wrote:
Hi Stefan, |
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Tue Apr 13 14:15:16 2010, Stefan Ritt, Simple example application to read a DRS evaluation board
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Heejong Kim wrote:
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Wed Apr 14 16:34:28 2010, Stefan Ritt, version 1.2 evaluation board with firmware 13279?
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Heejong Kim wrote:
Hi, Stefan,
I found that my collaborator bought 2 older version of evaluation board before.
They |
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Thu Apr 15 13:48:40 2010, Stefan Ritt, ROFS Configuration
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Hao Huan wrote:
Hi Stefan, |
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Mon May 3 11:09:12 2010, Stefan Ritt, DRS4 chip model
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Ignacio Diéguez Estremera wrote:
Hi all, |
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Mon May 3 17:10:29 2010, Stefan Ritt, DRS4 chip model
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Ignacio Diéguez Estremera wrote:
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Tue May 4 11:26:21 2010, Stefan Ritt, DRS4 chip model 
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Ignacio Diéguez Estremera wrote:
So i guess i won't be able to include drs4 in my simulations :-(. Any other |
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Thu May 6 08:15:39 2010, Stefan Ritt, Random noise spec in datasheet
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Ignacio Diéguez Estremera wrote:
Hi, |
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Wed May 12 16:26:12 2010, Stefan Ritt, DRS4 chip model
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Jinhong Wang wrote:
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Fri May 14 08:40:14 2010, Stefan Ritt, DVDD Problem of DRS 4
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Hao Huan wrote:
Hi Stefan, |
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Tue May 18 08:23:07 2010, Stefan Ritt, DVDD Problem of DRS 4
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Hao Huan wrote:
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 Tue May 18 09:24:02 2010, Stefan Ritt, Reference design for DRS4 active input buffer
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The design of high frequency differential input stages with the DRS4 is a challenge, since the chip draws quite some current at the input (up to 1 mA
at 5 GSPS), which must be sourced by the input buffer. A simple transformer as used in the DRS4 Evaluation Board 2.0 limits the bandwidth to 220 MHz. In
meantime two active input stages have been worked out and successfully been tested, both utilizing the THS4508 differential amplifier. The first design |
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Wed May 19 09:16:02 2010, Stefan Ritt, DVDD Problem of DRS 4
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Hao Huan wrote:
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Tue Jun 1 13:36:18 2010, Stefan Ritt, High Frequency Input for DRS
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Hao Huan wrote:
Hi Stefan, |
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Fri Jun 18 11:45:18 2010, Stefan Ritt, DVDD Problem of DRS 4
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Jinhong Wang wrote:
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