We are using the drs_exam.cpp to read out waveforms, but it seems to be outputting only sin waves on all channels - as if it was reading out the simulated waveform from the oscilloscope program if we run it without the board plugged in. Does anyone know what is causing this?

We are taking data with a pulser plugged into channel 1, which produces a single pulse with width of 8ns, and nothing plugged into channel 2. 

Our board is as follows:

Found DRS4 evaluation board, serial #2567, firmware revision 21305
Board type: 9

The output is something like the following:

Event #0 ----------------------
  t1[ns]  u1[mV]  t2[ns] u2[mV]
  0.000  -452.7   0.026  -469.3
  0.289  -460.8   0.293  -469.8
  0.413  -477.3   0.400  -481.5
  0.642  -485.3   0.650  -482.4
  0.806  -486.9   0.821  -477.8
  1.086  -476.8   1.085  -457.2
  1.183  -467.3   1.162  -446.4
  1.450  -435.6   1.459  -405.1
  1.619  -410.1   1.630  -373.3
  1.843  -366.2   1.851  -323.9
  1.945  -342.9   1.948  -298.9
  2.221  -275.7   2.210  -229.3
  2.359  -237.6   2.357  -187.6
  2.602  -165.6   2.609  -111.2
  2.687  -141.1   2.697   -84.3
  2.976   -50.5   2.987     5.5
  3.164     8.4   3.144    53.3
  3.377    73.9   3.384   124.2
  3.503   111.4   3.506   158.0
  3.753   182.0   3.769   226.9
  3.924   227.5   3.929   265.8
 

Sure, that’s correct. The example program turns on the internal sine wave generator in case people don’t have a real signal. That’s why it’s called „example“. Find the code which turns on the generator and change it. You will also have to change the trigger settings depending on your actual signal.

Stefan

I see. Where is the code that we can use to turn off the generator? I thought the example is taking data with CH1 as the trigger.

For our board, which is BoardType == 9, it is running these lines:

      b->EnableTrigger(1, 0);           // enable hardware trigger
      b->SetTriggerSource(1<<0);        // set CH1 as source

Is that not using the hardware trigger with CH1 as the source?

Actually in the original drs_exam.cpp the sine wave oscillator is turned off with this command

/* use following line to turn on the internal 100 MHz clock connected to all channels  */
//b->EnableTcal(1);

If you remove the "//" then the generator gets enabled. Probably you did this by accident. With this line commented out, you see the proper input like this:

Event #0 ----------------------
  t1[ns]  u1[mV]  t2[ns] u2[mV]
  0.000     1.9   0.000    -2.4
  0.195     0.5   0.195     0.3
  0.391     0.1   0.391    -1.4
  0.586    -0.7   0.586    -0.4
  0.781    -1.1   0.781    -2.4
  0.977    -0.6   0.977     0.0
  1.172    -1.5   1.172    -2.8
  1.367    -0.4   1.367    -0.6
  1.562    -1.2   1.562    -3.8
  1.758    -1.5   1.758    -1.7
  1.953    -1.0   1.953    -3.3
  2.148    -0.7   2.148    -1.8
  2.344    -1.6   2.344    -4.2
  2.539     0.5   2.539    -1.5
  2.734     0.2   2.734    -3.6
...

167.969    -3.4 167.969    -5.2
168.164    -3.7 168.164    -3.6
168.359     0.0 168.359    -2.0
168.555     1.9 168.555    -0.2
168.750     2.8 168.750    -2.8
168.945     5.4 168.945    -1.4
169.141    18.0 169.141     1.2
169.336    26.6 169.336     2.7
169.531    46.2 169.531     0.4
169.727    56.2 169.727     1.6
169.922    93.3 169.922     0.1
170.117   115.6 170.117     0.0
170.312   174.4 170.312    -1.5
170.508   206.9 170.508    -0.8
170.703   282.2 170.703    -2.4
170.898   328.4 170.898    -1.2
171.094   419.6 171.094    -3.2
171.289   465.8 171.289    -2.5
171.484   500.0 171.484    -2.0
171.680   500.0 171.680    -0.6
171.875   500.0 171.875    -4.0
172.070   500.0 172.070    -1.1
172.266   500.0 172.266    -3.7
172.461   500.0 172.461    -2.1
172.656   500.0 172.656    -5.0
172.852   500.0 172.852    -3.3
173.047   500.0 173.047    -4.8
173.242   500.0 173.242    -4.1
173.438   500.0 173.438    -5.1
173.633   500.0 173.633    -3.3
173.828   500.0 173.828    -6.4
174.023   500.0 174.023    -3.9
174.219   500.0 174.219    -5.5
174.414   500.0 174.414    -3.2
174.609   500.0 174.609    -3.6
174.805   500.0 174.805    -2.6
175.000   500.0 175.000    -5.2
175.195   500.0 175.195    -2.7
175.391   434.3 175.391    -3.9
175.586   391.7 175.586    -2.4
175.781   312.2 175.781    -4.1
175.977   275.7 175.977    -1.8
176.172   202.4 176.172    -3.8
176.367   167.6 176.367    -1.4
176.562   117.4 176.562    -2.9
176.758    96.1 176.758    -2.3
176.953    62.8 176.953    -3.3
177.148    49.1 177.148    -1.8
177.344    35.9 177.344    -4.3
177.539    33.4 177.539    -2.6
177.734    30.4 177.734    -4.2
...

Hej everyone!
I have some questions regarding what happens to some DRS registers in some scenarios:
1. How are the registers affected by a RESET? According to the data sheet all the CONFIG REGISTER bits are initilialized to 1. But what about the WRITE SHIFT and the READ SHIFT registers? Are they affected somehow after a RESET has been applied?
2. Suppose the DRS is happily running and I have done some readouts in ROI mode, so that the only "1"-value bit in the READ SHIFT register is in a random position. If now I want to execute a FULL READOUT, should I use the procedure explained in the data sheet (figure 11) for the FULL READOUT mode? or is this procedure useless since my "1"-value bit is already set somewhere in the READ SHIFT register and therefore a ROI readout of 1024 cells would be the solution (and getting the initial position from the SROUT pin)?

Thanks a lot!
Have a nice day!

Giovanni

Using the RESET line to reset registers is not a good idea since it can have some bad side-effects. The READ SHIFT register is NOT affected by RESET, so you have to inititialize these registers differently. To set a "1"-value at a defined position, you have to follow figure 11 in the data sheet. Once you executed that, your "1" is always at the same posiiton (namely cell #0), so after 1024 clock cycles you arrive at the same state, and do not have to re-do fig. 11 again.

Stefan

Hej Stefan! Thank you for your answer!

Just to be sure to have understood properly:
1. Using the RESET line should be avoided. And in any case, the CONFIG register and the WRITE SHIFT register need to be initialized "by hand" using the A0-A3, SRCLK and SRIN pins. Is it correct?

2. Doing the procedure shown in Figure 11 will always inject a "1" in cell #0 of the READ SHIFT register, regardless if (before starting the procedure) there was a "1" in any other cell, right?

Thank you!
Giovanni
 

1. WRITE SHIFT register and CONFIG registers are initialized to "1" on power up, but if you want to change that, use A0-A3 etc. as you indicated.

2. If you address the READ SHIFT register by applyin "1011" to A0-A3, the input of the register is connected to SRIN. So in fig. 11, you apply 1023x"0" plus 1x"1", which effectively clears the register and keeps one "1" at the last position, so on the next rising clock this gets shifted into position #0. If you do the readout, and NOT addresing the READ SHIFT register, then the input of that register is connected to it's output internally. Therefore the single "1" keep rotating on every 1024 clock cycles.

Thank you Stefan for replying!
I have still the RESET issue in mind: how would you suggest to reset properly the DRS? Is there a particular procedure to follow instead of just sending a negative pulse to the RESET pin? Is it preferable to turn the DRS off and then restart?

Thanks!

Giovanni

What I do is the following: Have the RESET input unconnected. When you power up, this makes an internal reset during the power up, and that's all you need. Then configure your registers using the sequences described in the manual. Then do not touch the RESET any more.

Stefan

Dear all,

I have a question about the function that drs4 can perform.

Is there any function in drs4 that is analogous to that of "persistence display" in oscilloscope?? (accumulating pulses)

Thank you

The chip itself can only sample a single waveform, that must be done in the attached software. The current DRSOscilloscope software coming with the evaluation board has not yet implemented that, but if you write your own software you can do so.

Hello,

I compiled base file for drs system  (DRS.cpp) to root framework (root.cern.ch) as dynamic library DRS.so. It can be used for building many kind of applications under the root system. I applied it for older version of  root 5.28 and for latest version 6.02 too.

If anyone is interesting, I can help, please write to me andrzej.grzeszczuk@us.edu.pl

Regards

Andrzej

Are there plans to add the drs software to github? (asking because I have users @ethz.ch that want to use it on debian,
thus I'm creating official debian packages of it, if license allows so, but talking to upstream (the developers) would be
much easier on github (or irc) than on this "DRS4 Discussion Forum".

Best,

Not github, but bitbucket: https://bitbucket.org/ritt/drs4eb/src/master/

But development kind of stalled, so there will be updates only in case of severe bugs, which are kind of gone after 10 years now.

Best,
Stefan

> Are there plans to add the drs software to github? (asking because I have users @ethz.ch that want to use it on debian,
> thus I'm creating official debian packages of it, if license allows so, but talking to upstream (the developers) would be
> much easier on github (or irc) than on this "DRS4 Discussion Forum".
> 
> Best,

I have problems with driver installation on windows 8.1 (software version 5.03). I have sen that that has been an issue before (driver signing) and I would like to know if this has been solved. We run several DRS4 evaluation boards on different PCs all running Win7 without any problems. Therefore we are almost confident that it is related to Win 8.1. Thanks.

Solved. Need to restart Windows 8.1 (64 bit) in recovery mode and dissable driver signing as mandatory. Then it works fine.

 Hi,

    Is there a straightforward way to convert the xml file format into the binary format?  I have some runs taken mistakenly with xml.

Best,

Chris

Hi,Stefan:

  recently,whtn I study the drs.cpp code ,I found that  the buffer[1] is char but the addr and the base_addr are all unsigned int,isn't there any problem that the addr may be cut off to 8 bits? Also ,I found that the data fpga recieved from the usb is 16 bits,so how can fpga get the true 32bits address from the PC.

The FPGA is very small, so it only has an address space of 256 bytes. Look at the definition in DRS.cpp

#define USB_CTRL_OFFSET                 0x00    /* all registers 32 bit */
#define USB_STATUS_OFFSET               0x40
#define USB_RAM_OFFSET                  0x80

The registers are 32 bits wide, but the addresses only run from 0 to 255, and thus a single byte is enough for addressing them.