DRS4 Forum
DRS4 Discussion Forum, Page 17 of 45
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Thu Jul 18 11:37:56 2019, Stefan Ritt, Trace Impedance
Fri Jul 19 01:37:09 2019, Ismael Garcia, Trace Impedance
Sat Jul 20 12:28:14 2019, Stefan Ritt, Trace Impedance
Wed Oct 21 15:03:13 2020, Seiya Nozaki, Timing diagram of SROUT/SRIN signal to write/read a write shift register
Tue Oct 27 13:37:23 2020, Stefan Ritt, Timing diagram of SROUT/SRIN signal to write/read a write shift register
Tue Oct 27 15:02:09 2020, Seiya Nozaki, Timing diagram of SROUT/SRIN signal to write/read a write shift register
Tue Oct 27 15:24:38 2020, Stefan Ritt, Timing diagram of SROUT/SRIN signal to write/read a write shift register
Wed Oct 28 04:32:19 2020, Seiya Nozaki, Timing diagram of SROUT/SRIN signal to write/read a write shift register
Thu Nov 8 11:44:35 2018, Davide Depaoli, Timing Issue
Thu Nov 8 11:54:33 2018, Stefan Ritt, Timing Issue
Thu Nov 8 12:02:34 2018, Davide Depaoli, Timing Issue
Mon Sep 15 16:24:41 2014, Hannes Wachter, Timing Calibration Fail
Mon Sep 22 15:04:37 2014, Stefan Ritt, Timing Calibration Fail
Wed Oct 5 22:43:29 2016, Will Flanagan, Timestamp for each DRS4 waveform
Thu Oct 6 11:18:05 2016, Stefan Ritt, Timestamp for each DRS4 waveform
Wed Jul 12 04:24:39 2017, Toshihiro Nonaka, Time resolution between boards
Wed Jul 12 20:16:05 2017, Stefan Ritt, Time resolution between boards
Fri Jul 21 09:16:02 2017, Volodymyr Rodin, Time output
Tue Jul 25 14:47:05 2017, Volodymyr Rodin, Time output
Tue Oct 17 14:58:58 2017, Vadym Denysenko, Time offset
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