Tue Sep 27 10:17:58 2022, Kunal Shinde, Required Firmware for DRS4 Evaluation Board Version 2.0
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Hi, I am working on an old DRS4 board Version "2.0" with firmware revision "13191", I was unable to find this specific firmware source
files ("VHDL source code"), please help me where could I find this or send me the required.
Regards, |
Tue Sep 27 10:37:11 2022, Stefan Ritt, Required Firmware for DRS4 Evaluation Board Version 2.0
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You find each software version at the usual download location at
https://www.dropbox.com/home/drs/drs4/distribution/Download/Linux
The one you need is probably drs-2.1.3.tar.gz which was the last version for the 2.0 board which is now more than 10 years old. |
Tue Sep 27 10:52:41 2022, Kunal Shinde, Required Firmware for DRS4 Evaluation Board Version 2.0
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I checked the link you provided but it seems that the link doesnt exist please send me valid one.
Regards,
Kunal |
Tue Sep 27 15:20:55 2022, Stefan Ritt, Required Firmware for DRS4 Evaluation Board Version 2.0
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Sorry, got the wrong link. Here the right one: https://www.dropbox.com/sh/clqo7ekr0ysbrip/AACoWJzrQAbf3WiBJHG89bGGa?dl=0
If you untar the archive, you will find a "firmware" subdirectory with all VHDL code.
Stefan |
Wed Aug 7 15:05:59 2013, Hermann-Josef Mathes, Repeated time calibration
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Hi,
is there any (obvious) reason why it is not possible (or not indended) to repeat the time calibration of a DRS4 eval board several times. I get |
Wed Aug 7 15:10:57 2013, Stefan Ritt, Repeated time calibration
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Hermann-Josef Mathes wrote:
Hi, |
Wed Aug 7 15:20:33 2013, Hermann-Josef Mathes, Repeated time calibration
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Stefan Ritt wrote:
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Wed Feb 5 13:41:42 2014, Stefan Ritt, Repeated time calibration
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Hermann-Josef Mathes wrote:
Hi Stefan, |
Wed Jun 1 09:57:43 2011, Martin Petriska, Removing spikes
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I have DSR4 eval board. Found that there are spikes in channels. Procedure Osc::RemoveSpikes to remove them looks litlle dificult. There is simple way,
if you doesnt need to measure all 4 channels.Spikes are in all channels, and it looks like they are same in time and value between channels. To remove
them, if you are not using one channel, substract that unused channel with spikes from used channel and your data will be without spikes. If you need all |
Thu Jun 2 21:01:29 2011, Stefan Ritt, Removing spikes
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Martin Petriska wrote:
I have DSR4 eval board. Found that there are spikes in channels. Procedure Osc::RemoveSpikes to remove |
Wed Sep 7 10:13:41 2022, Prajjalak Chattopadhyay, Register status after reset
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What are the default register statuses after DRS4 gets reset? |
Tue Jan 25 14:15:00 2022, Thomas M., Regarding measuring for a set time
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Hello,
I'm working on a project wherein we're looking at photomultipliers. We've already acquired a DRS4 evaluation board with the intent
of using it to gather our data. |
Tue Jan 25 14:34:42 2022, Stefan Ritt, Regarding measuring for a set time
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drsosc is a graphical application contiously acquiring data from the board, and drscl is a command line tool for debugging, as written in the manual.
The drsosc application runs indefinitely, but I guess you refer to saving data (by hitting the "Save" button in the drsosc application).
Yes the save functionality has a number of events, since you cannot store data indefinitely, since your harddisk does not have indefinite space! |
Tue Jan 25 14:44:49 2022, Thomas M., Regarding measuring for a set time
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Yes, you've got it exactly right. Thank you, that helps a lot!
Thomas
Stefan |
Tue May 18 09:24:02 2010, Stefan Ritt, Reference design for DRS4 active input buffer    
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The design of high frequency differential input stages with the DRS4 is a challenge, since the chip draws quite some current at the input (up to 1 mA
at 5 GSPS), which must be sourced by the input buffer. A simple transformer as used in the DRS4 Evaluation Board 2.0 limits the bandwidth to 220 MHz. In
meantime two active input stages have been worked out and successfully been tested, both utilizing the THS4508 differential amplifier. The first design |
Tue Oct 12 03:53:37 2010, Jinhong Wang, Reference design for DRS4 active input buffer
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Stefan Ritt wrote:
The design of high frequency differential input stages with the DRS4 is a challenge, since the chip |
Tue Nov 16 16:38:06 2010, Stefan Ritt, Reference design for DRS4 active input buffer
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Jinhong Wang wrote:
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Sun Feb 21 13:41:35 2010, Stefan Ritt, Real Time Conference 2010
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Hello,
may I draw your attention to the upcoming Real Time Conference 2010, taking place in Lisbon, Portugal, May 23rd to May 28th, 2010.
http://rt2010.ipfn.ist.utl.pt/ |
Thu Mar 4 19:14:10 2010, Hao Huan, Readout of DRS Data
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Hi Stefan,
thanks to your help I can now successfully keep the Domino wave running at a stable frequency and maintain the channel cascading
information in the Write Shift Register. (Since you told me WSR always reads and writes at the same time, I think I need to rewrite the information back |
Fri Mar 5 23:29:04 2010, Hao Huan, Readout of DRS Data
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Hao Huan wrote:
Hi Stefan, |