| ID |
Date |
Author |
Subject |
Text |
 |
|
754
|
Fri Jun 21 12:54:47 2019 |
Stefan Ritt | Evaluation firmware wait_vdd state | Dear Andrew,
the posting you mention is still
accurate. Any power supply will drop when |
|
|
757
|
Wed Jun 26 13:08:42 2019 |
Stefan Ritt | drs_exam is always reading out a sin wave | Sure, that’s correct. The example
program turns on the internal sine wave generator
in case people don’t have a real signal. |
|
|
760
|
Mon Jul 8 14:29:12 2019 |
Stefan Ritt | drs_exam is always reading out a sin wave | Actually in the original drs_exam.cpp the
sine wave oscillator is turned off with this
command |
|
|
762
|
Mon Jul 15 17:26:50 2019 |
Stefan Ritt | Evaluation Board Test Functionality | Have you set the trigger correctly to the
channel with your signal, polarity and level?
Do you undersand the difference between normal |
|
|
765
|
Thu Jul 18 11:37:56 2019 |
Stefan Ritt | Trace Impedance | The requiremnet is the same as for any
high speed analog board, there is othing
special with the DRS4. If you want to terminate |
|
|
767
|
Sat Jul 20 12:28:14 2019 |
Stefan Ritt | Trace Impedance | The DRS4 input is high impedance. So if
you like you can terminate it with 100 Ohm
differentially and route it with 100 Ohm. |
|
|
769
|
Tue Aug 20 10:44:45 2019 |
Stefan Ritt | should one deassert DENABLE while writing the write-shift register? | Hi Bill,
you keep DENABLE active all the
time to keep the Domino Wave running, but |
|
|
772
|
Tue Aug 27 09:14:03 2019 |
Stefan Ritt | DRS4 | Is a 5 GSPS oscilloscope suitable for use
with Silicon surface barier detectors?
|
|
|
775
|
Mon Oct 14 10:14:46 2019 |
Stefan Ritt | how to acquire the stop position with channel cascading | You first set A3-A0, on the next clock
cycle you issue pulses on srclk, and about
10ns after each clock pulse the output shows |
|
|
777
|
Mon Oct 14 12:56:13 2019 |
Stefan Ritt | how to acquire the stop position with channel cascading | Note that you have to read out the Write
Shift Register only if you do channel cascading,
e.g. configuring the chip with 4x2048 bins |
|
|
779
|
Mon Oct 14 15:27:09 2019 |
Stefan Ritt | how to acquire the stop position with channel cascading | If you configure the Write Shift Register
with 01010101b, then all you have to do after
a trigger is to set A3-A0 to 1101. The WSROUT |
|
|
782
|
Fri Oct 25 16:39:07 2019 |
Stefan Ritt | Computing corrected time from binary data...what is t_0,0? | t0,0 refers to the time of cell #0 of channel
#0. So basically you keep channel 0 fixed,
calculate the difference of each channel's |
|
|
786
|
Fri May 22 12:53:33 2020 |
Stefan Ritt | DRS4 Evaluation board control tool 'drscl' with macro file | There is an example program in the distribution
under software/drscl/drs_exam.cpp which is
a stand-alone program to do what you need. |
|
|
788
|
Fri May 22 13:24:51 2020 |
Stefan Ritt | Type check at DOFrame.h in official software | The software is a bit outdated, I will
soon make a new release.
In meantime, you can replace that |
|
|
791
|
Tue May 26 12:44:16 2020 |
Stefan Ritt | Domino wave | Look at the attached picture. For simplicity,
only 4 cells are open and tracking the input
signal. Time is flowing from top to bottom. |
|
|
794
|
Mon Aug 31 10:52:42 2020 |
Stefan Ritt | Dynamic Range Evaluation Board and Software | You cannot go below -0.5V for the inputs,
since the board does not have an internal
negative power supply, which would be necessary |
|
|
796
|
Mon Aug 31 17:17:30 2020 |
Stefan Ritt | Channel Cascading | If you have a board with cascading option,
it should show the "combined" option
in the 2048-bin option enabled (not grayed), |
|
|
798
|
Wed Oct 7 10:56:03 2020 |
Stefan Ritt | External triggering | The trigger is there only to trigger the
chip, but cannot be used as a precise time
reference. If you want to measure precise |
|
|
801
|
Tue Oct 27 13:37:23 2020 |
Stefan Ritt | Timing diagram of SROUT/SRIN signal to write/read a write shift register | Dear Seiya,
1) That's correct. SRIN is
ampled at the falling edge. Pleae make sure |
|
|
803
|
Tue Oct 27 15:24:38 2020 |
Stefan Ritt | Timing diagram of SROUT/SRIN signal to write/read a write shift register | This is a static shift register, so you
can make the clock as slow as you want. Actually
I don't use a "clock", I just |
|