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ID Date Author Subject Text   219   Fri Feb 22 11:46:17 2013 Yury Golod DRS4 trigger, different polarity Normal 0      218   Wed Feb 13 17:03:53 2013 Stefan Ritt Nonuniform sampling                                217   Wed Feb 13 16:58:40 2013 Martin Petriska Nonuniform sampling  Are there any plans to include reconstruction of nonuniform sampling  in DRS4 to get uniformly sampled data?      216   Tue Feb 5 14:38:35 2013 Stefan Ritt variation of sampling capacitors                                215   Fri Feb 1 17:43:48 2013 Jinhong Wang variation of sampling capacitors                                214   Thu Dec 27 18:15:14 2012 Jinhong Wang variation of sampling capacitors                                213   Thu Dec 27 09:49:17 2012 Stefan Ritt variation of sampling capacitors                                212   Thu Dec 27 00:12:12 2012 Jinhong Wang variation of sampling capacitors Hi Stefan, A quick question, what is the typical variation of the sampling capacitors in DRS4?      211   Fri Dec 14 21:49:29 2012 Stefan Ritt EVM rev4 board trigger change and drs_example                                210   Fri Dec 14 10:07:54 2012 Evgeni DRS-4 trigger             209   Fri Dec 14 10:07:14 2012 Evgeni DRS-4 trigger             208   Fri Dec 14 08:42:53 2012 Stefan Ritt DRS-4 trigger                                207   Thu Dec 13 19:49:47 2012 Evgeni DRS-4 trigger             206   Thu Dec 13 12:14:35 2012 Stefan Ritt DRS-4 trigger                                205   Thu Dec 13 12:03:29 2012 Evgeni DRS-4 trigger How to configure DRS oscilloscope for the oscillations with an amplitude greater than the value of the exposed      204   Thu Dec 6 09:23:36 2012 Martin Petriska EVM rev4 board trigger change and drs_example  I switched from rev 3 to rev 4 board, but have some problems with triggering, board is now waiting for trigger (rev.3 is working).      203   Tue Dec 4 09:55:43 2012 Stefan Ritt Question of drs4 using                                202   Tue Dec 4 09:50:11 2012 Zhongwei Du Question of drs4 using                                201   Tue Dec 4 09:39:44 2012 Stefan Ritt Question of drs4 using                                200   Tue Dec 4 09:24:22 2012 Zhongwei Du Question of drs4 using When Denable and Dwrite is high , the voltage of PLLOUT is 0 V.  And  the Dtap is turn high with no delay when the Denable

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