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New entries since:Thu Jan 1 01:00:00 1970
ID Date Authorup Subject Text Attachments
  309   Tue Nov 19 21:49:37 2013 Andriy ZatserklyaniyDRSOsc at Mac OS X Mavericks


  397   Fri Feb 13 10:12:16 2015 Andrzej Grzeszczukdrs4 and rootHello,

I compiled base file for drs system 
(DRS.cpp) to root framework (root.cern.ch)
  294   Mon Sep 23 09:22:52 2013 Andrzej RychterSampling Frequency: DRS4 eval boardIs it possible to set sampling frequency
at 100 MHz in DRS4 eval board? Trying to
set 0.1GHz in Osci program results in around
  296   Mon Sep 23 09:51:48 2013 Andrzej RychterSampling Frequency: DRS4 eval board


  14   Wed Oct 14 23:53:05 2009 Armin KolbDRS_exam using USB Evaluation Board with OS XFor the users using a Macintosh,
after several hours the Evaluation
Board is working  on my Macintosh (intel).
  773   Fri Sep 13 15:27:41 2019 Arseny RybnikovScaler / How to modify the firmware to change the scaler integration timeHello,

We want to use the inner DRS4 counter(scaler)
within more than the 100ms integration
  132   Sat Oct 15 04:45:25 2011 Aurelien BouvierDRS4 eval board: readout rateHi,
Our setup uses a DRS4 evaluation
board (version 2.0).
  241   Mon Apr 22 15:33:28 2013 Benjamin LeGeyteffect of jitter/alignment between SRCLK and ADC clockHello!
let me apologize in advance if this
has already been covered somewhere and I
  346   Fri May 16 14:04:47 2014 Benjamin LeGeytsimultaneous writing and reading with region of interest mode?Hello!
We're developing electronics based
on the DRS4 to read out a breast PET scanner
  237   Thu Apr 11 22:41:13 2013 Bill Ashmanskascode/details for optimal DRS4 timing calibration?Hi Stefan,
Is either some example code or a
detailed written description available for
  768   Mon Aug 19 23:01:22 2019 Bill Ashmanskasshould one deassert DENABLE while writing the write-shift register?Hi Stefan,

We have for some time now been
using custom firmware on a custom board to
  770   Tue Aug 20 16:05:21 2019 Bill Ashmanskasshould one deassert DENABLE while writing the write-shift register?Aha -- many thanks.  I think what
tripped up my test logic is that the "done"
state in drs4_eval5_app.vhd that executes
  117   Thu Apr 14 18:23:53 2011 Bob HiroskyFixes to DOScreen.cpp for recent built on linuxHello,

I was just building version 3.1.0 and ran
  761   Sat Jul 13 01:00:15 2019 Brendan PosehnEvaluation Board Test FunctionalityHello, 

I have recently obtained a DRS4
Evaluation Board (V5), but I am unable to
  763   Mon Jul 15 19:34:25 2019 Brendan PosehnEvaluation Board Test FunctionalityHello Stefan, 

Thanks for the quick reply. The
issue was a faulty SMA connector, should
  335   Tue Apr 15 18:35:41 2014 Carlo Stelladrs_exam project fail to compileHi,
when I try to compile drs_exam project
my computer give me this output:
  341   Thu Apr 24 23:03:25 2014 Carlo Stelladrs_exam project fail to compile


  412   Wed May 13 09:31:18 2015 Chenfei Yangtransparent-mode voltageHello Mr. Stefan Ritt

  For DRS4 differential inputs
ranges form 500mV to 1100mV, with ROFS set
  414   Wed May 13 09:55:09 2015 Chenfei Yangtransparent-mode voltageHere's the problem. My external ADC
has 2Vpp differtial input voltage range.
And the common-mode voltage of the inputs
  416   Wed May 13 10:27:43 2015 Chenfei Yangtransparent-mode voltageI'm using an AD9252, 0.9V common mode
voltage is suggested and I already use 8
un-switchable level shifters. Just as you
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