| ID |
Date |
Author |
Subject |
Text |
 |
|
768
|
Mon Aug 19 23:01:22 2019 |
Bill Ashmanskas | should one deassert DENABLE while writing the write-shift register? | Hi Stefan,
We have for some time now been
using custom firmware on a custom board to |
|
|
769
|
Tue Aug 20 10:44:45 2019 |
Stefan Ritt | should one deassert DENABLE while writing the write-shift register? | Hi Bill,
you keep DENABLE active all the
time to keep the Domino Wave running, but |
|
|
770
|
Tue Aug 20 16:05:21 2019 |
Bill Ashmanskas | should one deassert DENABLE while writing the write-shift register? | Aha -- many thanks. I think what
tripped up my test logic is that the "done"
state in drs4_eval5_app.vhd that executes |
|
|
514
|
Wed Apr 27 08:14:14 2016 |
Toshihiro Nonaka | serial number problem | Dear all,
I'm using 3 DRS boards simultaneously
and their serial numbers are 2169, 2170, |
|
|
515
|
Wed Apr 27 09:04:01 2016 |
Stefan Ritt | serial number problem | If dis- and reconnecting the board does
not help, there is the (small) chance that
the serial number got erased in the board. |
|
|
516
|
Wed Apr 27 09:51:37 2016 |
Toshihiro Nonaka | serial number problem | The serial number has been fixed by
using drscl. Thank you！
|
|
|
313
|
Tue Nov 26 15:36:39 2013 |
Dmitry Hits | reducing sampling speed | Dear Stefan
Is there an easy way to reduce sampling
speed below 0.7 GSPS? I would like to record |
|
|
314
|
Tue Nov 26 15:38:13 2013 |
Stefan Ritt | reducing sampling speed |
|
|
|
827
|
Tue May 4 21:18:28 2021 |
Abaz Kryemadhi | recording only timestamp and amplitude and/or filesize maximum | Hi,
I have been collecting some date
using the DRS4 board at a trigger rate of |
|
|
828
|
Wed May 5 10:12:44 2021 |
Stefan Ritt | recording only timestamp and amplitude and/or filesize maximum | The maximum file size depends on the underlying
linux file system. Common values are 4-16
GBytes. |
|
|
526
|
Wed Jun 1 22:29:01 2016 |
Dominik Neise | problems when stop cell >= 767 ?? | Hello Stefan,
some colleages told me a story,
I was neither able to confirm nor find anything |
|
|
527
|
Wed Jun 1 23:16:01 2016 |
Stefan Ritt | problems when stop cell >= 767 ?? | I cannot confirm the story with the "stop
capacitor > 767". It can be seen
from your plots that the distribution of |
|
|
528
|
Sun Jun 12 08:45:52 2016 |
Michael | problems of DRS4 | Hi
I want to use DRS4 to
digitize 16 channels of signals. The width |
|
|
Draft
|
Sun Jun 12 08:49:54 2016 |
Michael | problems of DRS4 | Hi
I want to use DRS4 to
digitize 16 channels of signals. The width |
|
|
530
|
Wed Jun 15 14:49:00 2016 |
Stefan Ritt | problems of DRS4 | 1. Simultaneous writing and reading is
not possible with the DRS4 chip. The manual
says differently on p. 14, but due to a bug |
|
|
653
|
Thu Jan 25 05:24:05 2018 |
chen wenjun | problem with the drscl(drs507) | Hi! Stefan:
when I change a new computer(win7,64bit),I
meet a problem that the drscl app cannot |
|
|
655
|
Thu Jan 25 08:00:16 2018 |
Stefan Ritt | problem with the drscl(drs507) | This problem has been reported by several
people, like elog:551
So far I could not solve it. On |
|
|
656
|
Thu Jan 25 08:07:32 2018 |
chen wenjun | problem with the drscl(drs507) | I have tried about 4 computers,only one
worked fine.I truly want to know how others
get this fixed,can you get in touch with |
|
|
19
|
Mon Oct 19 11:26:29 2009 |
Jinhong Wang | output common mode voltage of DRS4 | Hello Mr.
Stifan.Ritt
In
the DSR4 datasheet, it is mentioned that |
|
|
20
|
Mon Oct 19 12:46:12 2009 |
Stefan Ritt | output common mode voltage of DRS4 |
|
|