| ID |
Date |
Author |
Subject |
|
916
|
Thu Mar 27 15:53:10 2025 |
Justin Tabbett | Noisy counts with adapted drs_exam.cpp | Greetings,
I have adapted the drs_exam.cpp to allow for a user input number of channels and trigger levels.
The program mostly works well, however there are counts which form a noise peak, imposed on the regular channel response.
To illustrate, I acquired 10,000 counts (measuring peak to peak) with the drsosc, and with my adapted script, with two channels and OR trigger logic.
Is there something missing in my code that could explain the cause of this noise peak? I have attached the .cpp file.
Many thanks,
Justin |
| Attachment 1: Channel_1_2.png
|
|
| Attachment 2: drs_exam.cpp
|
/********************************************************************\
Name: drs_exam.cpp
Created by: Stefan Ritt
Contents: Simple example application to read out a DRS4
evaluation board
$Id: drs_exam.cpp 21308 2014-04-11 14:50:16Z ritt $
\********************************************************************/
#include <math.h>
#ifdef _MSC_VER
#include <windows.h>
#elif defined(OS_LINUX)
#define O_BINARY 0
#include <unistd.h>
#include <ctype.h>
#include <sys/ioctl.h>
#include <errno.h>
#define DIR_SEPARATOR '/'
#endif
#include <stdio.h>
#include <string.h>
#include <stdlib.h>
#include "strlcpy.h"
#include "DRS.h"
#include <math.h>
#include <cstdio>
#include <fcntl.h>
#include <time.h>
#include <sys/stat.h>
#include <assert.h>
#include <iostream>
#include <chrono>
#include <vector>
#include <algorithm>
#include <iostream>
#include <conio.h> // For _kbhit() and _getch() functions (Windows only)
/*------------------------------------------------------------------*/
int main()
{
int i, j, k, l, m, n, p, numC, nBoards, i_start, i_end, csel;
char str[256], param[10][100];
DRS* drs;
DRSBoard* b;
float time_array[8][1024];
float wave_array[8][1024];
FILE* f;
FILE* fph;
/* do initial scan */
drs = new DRS();
/* show any found board(s) */
for (i = 0; i < drs->GetNumberOfBoards(); i++) {
b = drs->GetBoard(i);
printf("Found DRS4 evaluation board, serial #%d, firmware revision %d\n",
b->GetBoardSerialNumber(), b->GetFirmwareVersion());
}
/* exit if no board found */
nBoards = drs->GetNumberOfBoards();
if (nBoards == 0) {
printf("No DRS4 evaluation board found\n");
return 0;
}
/* continue working with first board only */
b = drs->GetBoard(0);
/* initialize board */
b->Init();
/* set sampling frequency */
b->SetFrequency(5, true);
/* enable transparent mode needed for analog trigger */
b->SetTranspMode(1);
/* set input range to -0.5V ... +0.5V */
b->SetInputRange(0);
/* use following line to turn on the internal 100 MHz clock connected to all channels */
b->EnableTcal(1);
printf("Number of channels: ");
fgets(str, sizeof(str), stdin);
csel = atoi(str); //Number of channels
printf("DRS4 configured for %d channels\n", atoi(str));
b->EnableTrigger(1, 0);
b->SetTriggerSource(15); // 15 is an OR on CH1-4, 3 is OR on CH1-2, apparently 768 is the AND value for CH1 and CH2
b->SetTriggerPolarity(true); // positive edge -> false, negative edge -> true
std::vector<int> avn = { 1, 2, 3, 4 }; // Available number of channels: 0, 2, 4, 6
std::vector<double> triglist = { 0, 0, 0, 0 }; //Store trigger thresholds
for (i = 0;i < csel;i++) {
printf("Channel %d trigger level (V): ", avn[i]);
fgets(str, sizeof(str), stdin);
b->SetIndividualTriggerLevel((avn[i] - 1), atof(str));
triglist[i] = atof(str) * -1000; //store as mV
printf("Trigger level set to %1.3lf Volt\n", atof(str));
}
b->SetTriggerDelayNs(0); // zero ns trigger delay
fph = fopen("fph.txt", "w");
if (fph == NULL) {
perror("ERROR: Cannot open file \"fph.txt\"");
return 1;
}
numC = 0; //Event counter
for (i = 0;i < csel;i++) {
fprintf(fph, "%7.1f,", triglist[i]);
}
fprintf(fph, "%d\n", 0);
printf("hi\n");
while (true) {
// Check if a key is pressed
if (_kbhit()) {
char ch = _getch(); // Read the pressed key without waiting for Enter
if (ch == 'q') // If 'q' is pressed, exit the loop
break;
}
k = 0;
l = 0;
m = 0;
n = 0;
std::vector<double> outh(csel, 0); //Create output for pulse heights as 0s
printf("Before startdomino\n");
b->StartDomino();
/* wait for trigger */
printf("Before fflushstdout\n");
fflush(stdout);
while (b->IsBusy());
/*Take time stamp*/
auto now = std::chrono::system_clock::now();
auto duration = std::chrono::duration<double>(now.time_since_epoch());
double timeT = duration.count();
/*Read waveforms*/
b->TransferWaves(0, 8);
for (p = 0;p < csel;p++) {
b->GetWave(0, p * 2, wave_array[p]); // this reads channel i*2 to array index i
float minVali = wave_array[p][0], maxVali = wave_array[p][0]; //creates floats for min and max values
for (i = 0; i < 1024; i++) {
// find the min and max values from each channel
if (wave_array[p][i] < minVali) minVali = wave_array[p][i];
if (wave_array[p][i] > maxVali) maxVali = wave_array[p][i];
}
float heighti = maxVali - minVali;
outh[p] = heighti;
}
for (double value : outh) {
fprintf(fph, "%7.1f,", value);
}
fprintf(fph, "%.6f\n", timeT);
printf("%d\n", numC);
if (numC % 1000 == 0) {
fflush(fph);
}
numC++;
}
fclose(fph);
std::getchar();
/* delete DRS object -> close USB connection */
delete drs;
}
|
|
915
|
Wed Mar 26 08:42:08 2025 |
Stefan Ritt | drs_exam.cpp not compile | You have to link against the DRS.cpp library, plus usblib, plus ... Note there is both a Makefile and a CMakeLists.txt for it. Google how to use "make" or "cmake".
Stefan |
|
914
|
Tue Mar 25 16:31:41 2025 |
Matías Tobar | drs_exam.cpp not compile | Hi! i'm trying to compile drs_exam.cpp but it yields the following error lines:
I do have the "DRS.h" file on the same folder, which is clearly the file that's causing troubles. I also tried to run "DRS.cpp" but it yields a similar error lines. ('sin definir' means 'not defined').
Thanks a lot for the help!
$ g++ drs_exam.cpp -o drs_exam
/usr/bin/ld: /tmp/ccroK16H.o: en la función `main':
drs_exam.cpp:(.text+0x48): referencia a `DRS::DRS()' sin definir
/usr/bin/ld: drs_exam.cpp:(.text+0x135): referencia a `DRSBoard::Init()' sin definir
/usr/bin/ld: drs_exam.cpp:(.text+0x155): referencia a `DRSBoard::SetFrequency(double, bool)' sin definir
/usr/bin/ld: drs_exam.cpp:(.text+0x169): referencia a `DRSBoard::SetTranspMode(int)' sin definir
/usr/bin/ld: drs_exam.cpp:(.text+0x184): referencia a `DRSBoard::SetInputRange(double)' sin definir
/usr/bin/ld: drs_exam.cpp:(.text+0x1b6): referencia a `DRSBoard::EnableTrigger(int, int)' sin definir
/usr/bin/ld: drs_exam.cpp:(.text+0x1ca): referencia a `DRSBoard::SetTriggerConfig(int)' sin definir
/usr/bin/ld: drs_exam.cpp:(.text+0x1fe): referencia a `DRSBoard::EnableTrigger(int, int)' sin definir
/usr/bin/ld: drs_exam.cpp:(.text+0x212): referencia a `DRSBoard::SetTriggerConfig(int)' sin definir
/usr/bin/ld: drs_exam.cpp:(.text+0x22d): referencia a `DRSBoard::SetTriggerLevel(double)' sin definir
/usr/bin/ld: drs_exam.cpp:(.text+0x241): referencia a `DRSBoard::SetTriggerPolarity(bool)' sin definir
/usr/bin/ld: drs_exam.cpp:(.text+0x255): referencia a `DRSBoard::SetTriggerDelayNs(int)' sin definir
/usr/bin/ld: drs_exam.cpp:(.text+0x2b6): referencia a `DRSBoard::StartDomino()' sin definir
/usr/bin/ld: drs_exam.cpp:(.text+0x2e9): referencia a `DRSBoard::IsBusy()' sin definir
/usr/bin/ld: drs_exam.cpp:(.text+0x30b): referencia a `DRSBoard::TransferWaves(int, int)' sin definir
/usr/bin/ld: drs_exam.cpp:(.text+0x326): referencia a `DRSBoard::GetTriggerCell(unsigned int)' sin definir
/usr/bin/ld: drs_exam.cpp:(.text+0x350): referencia a `DRSBoard::GetTime(unsigned int, int, int, float*, bool, bool)' sin definir
/usr/bin/ld: drs_exam.cpp:(.text+0x377): referencia a `DRSBoard::GetWave(unsigned int, unsigned char, float*)' sin definir
/usr/bin/ld: drs_exam.cpp:(.text+0x392): referencia a `DRSBoard::GetTriggerCell(unsigned int)' sin definir
/usr/bin/ld: drs_exam.cpp:(.text+0x3c3): referencia a `DRSBoard::GetTime(unsigned int, int, int, float*, bool, bool)' sin definir
/usr/bin/ld: drs_exam.cpp:(.text+0x3f1): referencia a `DRSBoard::GetWave(unsigned int, unsigned char, float*)' sin definir
/usr/bin/ld: drs_exam.cpp:(.text+0x52e): referencia a `DRS::~DRS()' sin definir
collect2: error: ld returned 1 exit status
|
| Attachment 1: DRS.h
|
/********************************************************************
DRS.h, S.Ritt, M. Schneebeli - PSI
$Id: DRS.h 21309 2014-04-11 14:51:29Z ritt $
********************************************************************/
#ifndef DRS_H
#define DRS_H
#include <stdio.h>
#include <string.h>
#include "averager.h"
#ifdef HAVE_LIBUSB
# ifndef HAVE_USB
# define HAVE_USB
# endif
#endif
#ifdef HAVE_USB
# include <musbstd.h>
#endif // HAVE_USB
#ifdef HAVE_VME
# include <mvmestd.h>
#endif // HAVE_VME
/* disable "deprecated" warning */
#ifdef _MSC_VER
#pragma warning(disable: 4996)
#endif
#ifndef NULL
#define NULL 0
#endif
int drs_kbhit();
unsigned int millitime();
/* transport mode */
#define TR_VME 1
#define TR_USB 2
#define TR_USB2 3
/* address types */
#ifndef T_CTRL
#define T_CTRL 1
#define T_STATUS 2
#define T_RAM 3
#define T_FIFO 4
#endif
/*---- Register addresses ------------------------------------------*/
#define REG_CTRL 0x00000 /* 32 bit control reg */
#define REG_DAC_OFS 0x00004
#define REG_DAC0 0x00004
#define REG_DAC1 0x00006
#define REG_DAC2 0x00008
#define REG_DAC3 0x0000A
#define REG_DAC4 0x0000C
#define REG_DAC5 0x0000E
#define REG_DAC6 0x00010
#define REG_DAC7 0x00012
#define REG_CHANNEL_CONFIG 0x00014 // low byte
#define REG_CONFIG 0x00014 // high byte
#define REG_CHANNEL_MODE 0x00016
#define REG_ADCCLK_PHASE 0x00016
#define REG_FREQ_SET_HI 0x00018 // DRS2
#define REG_FREQ_SET_LO 0x0001A // DRS2
#define REG_TRG_DELAY 0x00018 // DRS4
#define REG_FREQ_SET 0x0001A // DRS4
#define REG_TRIG_DELAY 0x0001C
#define REG_LMK_MSB 0x0001C // DRS4 Mezz
#define REG_CALIB_TIMING 0x0001E // DRS2
#define REG_EEPROM_PAGE_EVAL 0x0001E // DRS4 Eval
#define REG_EEPROM_PAGE_MEZZ 0x0001A // DRS4 Mezz
#define REG_TRG_CONFIG 0x0001C // DRS4 Eval4
#define REG_LMK_LSB 0x0001E // DRS4 Mezz
#define REG_READOUT_DELAY 0x00020 // DRS4 Eval5
#define REG_WARMUP 0x00020 // DRS4 Mezz
#define REG_COOLDOWN 0x00022 // DRS4 Mezz
#define REG_READ_POINTER 0x00026 // DRS4 Mezz
#define REG_MAGIC 0x00000
#define REG_BOARD_TYPE 0x00002
#define REG_STATUS 0x00004
#define REG_RDAC_OFS 0x0000E
#define REG_RDAC0 0x00008
#define REG_STOP_CELL0 0x00008
#define REG_RDAC1 0x0000A
#define REG_STOP_CELL1 0x0000A
#define REG_RDAC2 0x0000C
#define REG_STOP_CELL2 0x0000C
#define REG_RDAC3 0x0000E
#define REG_STOP_CELL3 0x0000E
#define REG_RDAC4 0x00000
#define REG_RDAC5 0x00002
#define REG_STOP_WSR0 0x00010
#define REG_STOP_WSR1 0x00011
#define REG_STOP_WSR2 0x00012
#define REG_STOP_WSR3 0x00013
#define REG_RDAC6 0x00014
#define REG_RDAC7 0x00016
#define REG_EVENTS_IN_FIFO 0x00018
#define REG_EVENT_COUNT 0x0001A
#define REG_FREQ1 0x0001C
#define REG_FREQ2 0x0001E
#define REG_WRITE_POINTER 0x0001E
#define REG_TEMPERATURE 0x00020
#define REG_TRIGGER_BUS 0x00022
#define REG_SERIAL_BOARD 0x00024
#define REG_VERSION_FW 0x00026
#define REG_SCALER0 0x00028
#define REG_SCALER1 0x0002C
#define REG_SCALER2 0x00030
#define REG_SCALER3 0x00034
#define REG_SCALER4 0x00038
#define REG_SCALER5 0x0003C
/*---- Control register bit definitions ----------------------------*/
#define BIT_START_TRIG (1<<0) // write a "1" to start domino wave
#define BIT_REINIT_TRIG (1<<1) // write a "1" to stop & reset DRS
#define BIT_SOFT_TRIG (1<<2) // write a "1" to stop and read data to RAM
#define BIT_EEPROM_WRITE_TRIG (1<<3) // write a "1" to write into serial EEPROM
#define BIT_EEPROM_READ_TRIG (1<<4) // write a "1" to read from serial EEPROM
#define BIT_MULTI_BUFFER (1<<16) // Use multi buffering when "1"
#define BIT_DMODE (1<<17) // (*DRS2*) 0: single shot, 1: circular
#define BIT_ADC_ACTIVE (1<<17) // (*DRS4*) 0: stop ADC when running, 1: ADC always clocked
#define BIT_LED (1<<18) // 1=on, 0=blink during readout
#define BIT_TCAL_EN (1<<19) // switch on (1) / off (0) for 33 MHz calib signal
#define BIT_TCAL_SOURCE (1<<20)
#define BIT_REFCLK_SOURCE (1<<20)
#define BIT_FREQ_AUTO_ADJ (1<<21) // DRS2/3
#define BIT_TRANSP_MODE (1<<21) // DRS4
#define BIT_ENABLE_TRIGGER1 (1<<22) // External LEMO/FP/TRBUS trigger
#define BIT_LONG_START_PULSE (1<<23) // (*DRS2*) 0:short start pulse (>0.8GHz), 1:long start pulse (<0.8GHz)
#define BIT_READOUT_MODE (1<<23) // (*DRS3*,*DRS4*) 0:start from first bin, 1:start from domino stop
#define BIT_DELAYED_START (1<<24) // DRS2: start domino wave 400ns after soft trigger, used for waveform
// generator startup
#define BIT_NEG_TRIGGER (1<<24) // DRS4: use high-to-low trigger if set
#define BIT_ACAL_EN (1<<25) // connect DRS to inputs (0) or to DAC6 (1)
#define BIT_TRIGGER_DELAYED (1<<26) // select delayed trigger from trigger bus
#define BIT_ADCCLK_INVERT (1<<26) // invert ADC clock
#define BIT_REFCLK_EXT (1<<26) // use external MMCX CLKIN refclk
#define BIT_DACTIVE (1<<27) // keep domino wave running during readout
#define BIT_STANDBY_MODE (1<<28) // put chip in standby mode
#define BIT_TR_SOURCE1 (1<<29) // trigger source selection bits
#define BIT_DECIMATION (1<<29) // drop all odd samples (DRS4 mezz.)
#define BIT_TR_SOURCE2 (1<<30) // trigger source selection bits
#define BIT_ENABLE_TRIGGER2 (1<<31) // analog threshold (internal) trigger
/* DRS4 configuration register bit definitions */
#define BIT_CONFIG_DMODE (1<<8) // 0: single shot, 1: circular
#define BIT_CONFIG_PLLEN (1<<9) // write a "1" to enable the internal PLL
#define BIT_CONFIG_WSRLOOP (1<<10) // write a "1" to connect WSROUT to WSRIN internally
/*---- Status register bit definitions -----------------------------*/
#define BIT_RUNNING (1<<0) // one if domino wave running or readout in progress
#define BIT_NEW_FREQ1 (1<<1) // one if new frequency measurement available
#define BIT_NEW_FREQ2 (1<<2)
#define BIT_PLL_LOCKED0 (1<<1) // 1 if PLL has locked (DRS4 evaluation board only)
#define BIT_PLL_LOCKED1 (1<<2) // 1 if PLL DRS4 B has locked (DRS4 mezzanine board only)
#define BIT_PLL_LOCKED2 (1<<3) // 1 if PLL DRS4 C has locked (DRS4 mezzanine board only)
#define BIT_PLL_LOCKED3 (1<<4) // 1 if PLL DRS4 D has locked (DRS4 mezzanine board only)
#define BIT_SERIAL_BUSY (1<<5) // 1 if EEPROM operation in progress
#define BIT_LMK_LOCKED (1<<6) // 1 if PLL of LMK chip has locked (DRS4 mezzanine board only)
#define BIT_2048_MODE (1<<7) // 1 if 2048-bin mode has been soldered
enum DRSBoardConstants {
kNumberOfChannelsMax = 10,
kNumberOfCalibChannelsV3 = 10,
kNumberOfCalibChannelsV4 = 8,
kNumberOfBins = 1024,
kNumberOfChipsMax = 4,
kFrequencyCacheSize = 10,
kBSplineOrder = 4,
kPreCaliculatedBSplines = 1000,
kPreCaliculatedBSplineGroups = 5,
kNumberOfADCBins = 4096,
kBSplineXMinOffset = 20,
kMaxNumberOfClockCycles = 100,
};
enum DRSErrorCodes {
kSuccess = 0,
kInvalidTriggerSignal = -1,
kWrongChannelOrChip = -2,
kInvalidTransport = -3,
kZeroSuppression = -4,
kWaveNotAvailable = -5
};
/*---- callback class ----*/
class DRSCallback
{
public:
virtual void Progress(int value) = 0;
virtual ~DRSCallback() {};
};
/*------------------------*/
class DRSBoard;
class ResponseCalibration {
protected:
class CalibrationData {
public:
class CalibrationDataChannel {
public:
unsigned char fLimitGroup[kNumberOfBins]; //!
float fMin[kNumberOfBins]; //!
float fRange[kNumberOfBins]; //!
short fOffset[kNumberOfBins]; //!
short fGain[kNumberOfBins]; //!
unsigned short fOffsetADC[kNumberOfBins]; //!
short *fData[kNumberOfBins]; //!
unsigned char *fLookUp[kNumberOfBins]; //!
unsigned short fLookUpOffset[kNumberOfBins]; //!
unsigned char fNumberOfLookUpPoints[kNumberOfBins]; //!
float *fTempData; //!
private:
CalibrationDataChannel(const CalibrationDataChannel &c); // not implemented
CalibrationDataChannel &operator=(const CalibrationDataChannel &rhs); // not implemented
public:
CalibrationDataChannel(int numberOfGridPoints)
:fTempData(new float[numberOfGridPoints]) {
int i;
for (i = 0; i < kNumberOfBins; i++) {
fData[i] = new short[numberOfGridPoints];
}
memset(fLimitGroup, 0, sizeof(fLimitGroup));
memset(fMin, 0, sizeof(fMin));
memset(fRange, 0, sizeof(fRange));
memset(fOffset, 0, sizeof(fOffset));
memset(fGain, 0, sizeof(fGain));
memset(fOffsetADC, 0, sizeof(fOffsetADC));
memset(fLookUp, 0, sizeof(fLookUp));
memset(fLookUpOffset, 0, sizeof(fLookUpOffset));
memset(fNumberOfLookUpPoints, 0, sizeof(fNumberOfLookUpPoints));
}
~CalibrationDataChannel() {
int i;
delete fTempData;
for (i = 0; i < kNumberOfBins; i++) {
delete fData[i];
delete fLookUp[i];
}
}
};
bool fRead; //!
CalibrationDataChannel *fChannel[10]; //!
unsigned char fNumberOfGridPoints; //!
int fHasOffsetCalibration; //!
float fStartTemperature; //!
float fEndTemperature; //!
int *fBSplineOffsetLookUp[kNumberOfADCBins]; //!
float **fBSplineLookUp[kNumberOfADCBins]; //!
float fMin; //!
float fMax; //!
unsigned char fNumberOfLimitGroups; //!
static float fIntRevers[2 * kBSplineOrder - 2];
private:
CalibrationData(const CalibrationData &c); // not implemented
CalibrationData &operator=(const CalibrationData &rhs); // not implemented
public:
CalibrationData(int numberOfGridPoints);
~CalibrationData();
static int CalculateBSpline(int nGrid, float value, float *bsplines);
void PreCalculateBSpline();
void DeletePreCalculatedBSpline();
};
// General Fields
DRSBoard *fBoard;
double fPrecision;
// Fields for creating the Calibration
bool fInitialized;
bool fRecorded;
bool fFitted;
bool fOffset;
bool fCalibrationValid[2];
int fNumberOfPointsLowVolt;
int fNumberOfPoints;
int fNumberOfMode2Bins;
int fNumberOfSamples;
int fNumberOfGridPoints;
int fNumberOfXConstPoints;
... 655 more lines ...
|
| Attachment 2: drs_exam.cpp
|
/********************************************************************\
Name: drs_exam.cpp
Created by: Stefan Ritt
Contents: Simple example application to read out a DRS4
evaluation board
$Id: drs_exam.cpp 21308 2014-04-11 14:50:16Z ritt $
\********************************************************************/
#include <math.h>
#ifdef _MSC_VER
#include <windows.h>
#elif defined(OS_LINUX)
#define O_BINARY 0
#include <unistd.h>
#include <ctype.h>
#include <sys/ioctl.h>
#include <errno.h>
#define DIR_SEPARATOR '/'
#endif
#include <stdio.h>
#include <string.h>
#include <stdlib.h>
#include "strlcpy.h"
#include "DRS.h"
/*------------------------------------------------------------------*/
int main()
{
int i, j, nBoards;
DRS *drs;
DRSBoard *b;
float time_array[8][1024];
float wave_array[8][1024];
FILE *f;
/* do initial scan */
drs = new DRS();
/* show any found board(s) */
for (i=0 ; i<drs->GetNumberOfBoards() ; i++) {
b = drs->GetBoard(i);
printf("Found DRS4 evaluation board, serial #%d, firmware revision %d\n",
b->GetBoardSerialNumber(), b->GetFirmwareVersion());
}
/* exit if no board found */
nBoards = drs->GetNumberOfBoards();
if (nBoards == 0) {
printf("No DRS4 evaluation board found\n");
return 0;
}
/* continue working with first board only */
b = drs->GetBoard(0);
/* initialize board */
b->Init();
/* set sampling frequency */
b->SetFrequency(5, true);
/* enable transparent mode needed for analog trigger */
b->SetTranspMode(1);
/* set input range to -0.5V ... +0.5V */
b->SetInputRange(0);
/* use following line to set range to 0..1V */
//b->SetInputRange(0.5);
/* use following line to turn on the internal 100 MHz clock connected to all channels */
//b->EnableTcal(1);
/* use following lines to enable hardware trigger on CH1 at 50 mV positive edge */
if (b->GetBoardType() >= 8) { // Evaluaiton Board V4&5
b->EnableTrigger(1, 0); // enable hardware trigger
b->SetTriggerConfig(1<<0); // set CH1 as source
} else if (b->GetBoardType() == 7) { // Evaluation Board V3
b->EnableTrigger(0, 1); // lemo off, analog trigger on
b->SetTriggerConfig(1); // use CH1 as source
}
b->SetTriggerLevel(0.05); // 0.05 V
b->SetTriggerPolarity(false); // positive edge
/* use following lines to set individual trigger elvels */
//b->SetIndividualTriggerLevel(1, 0.1);
//b->SetIndividualTriggerLevel(2, 0.2);
//b->SetIndividualTriggerLevel(3, 0.3);
//b->SetIndividualTriggerLevel(4, 0.4);
//b->SetTriggerSource(15);
b->SetTriggerDelayNs(0); // zero ns trigger delay
/* use following lines to enable the external trigger */
//if (b->GetBoardType() >= 8) { // Evaluaiton Board V4&5
// b->EnableTrigger(1, 0); // enable hardware trigger
// b->SetTriggerConfig(1<<4); // set external trigger as source
//} else { // Evaluation Board V3
// b->EnableTrigger(1, 0); // lemo on, analog trigger off
//}
/* open file to save waveforms */
f = fopen("data.txt", "w");
if (f == NULL) {
perror("ERROR: Cannot open file \"data.txt\"");
return 1;
}
/* repeat ten times */
for (j=0 ; j<10 ; j++) {
/* start board (activate domino wave) */
b->StartDomino();
/* wait for trigger */
printf("Waiting for trigger...");
fflush(stdout);
while (b->IsBusy());
/* read all waveforms */
b->TransferWaves(0, 8);
/* read time (X) array of first channel in ns */
b->GetTime(0, 0, b->GetTriggerCell(0), time_array[0]);
/* decode waveform (Y) array of first channel in mV */
b->GetWave(0, 0, wave_array[0]);
/* read time (X) array of second channel in ns
Note: On the evaluation board input #1 is connected to channel 0 and 1 of
the DRS chip, input #2 is connected to channel 2 and 3 and so on. So to
get the input #2 we have to read DRS channel #2, not #1. */
b->GetTime(0, 2, b->GetTriggerCell(0), time_array[1]);
/* decode waveform (Y) array of second channel in mV */
b->GetWave(0, 2, wave_array[1]);
/* Save waveform: X=time_array[i], Yn=wave_array[n][i] */
fprintf(f, "Event #%d ----------------------\n t1[ns] u1[mV] t2[ns] u2[mV]\n", j);
for (i=0 ; i<1024 ; i++)
fprintf(f, "%7.3f %7.1f %7.3f %7.1f\n", time_array[0][i], wave_array[0][i], time_array[1][i], wave_array[1][i]);
/* print some progress indication */
printf("\rEvent #%d read successfully\n", j);
}
fclose(f);
/* delete DRS object -> close USB connection */
delete drs;
}
|
|
913
|
Mon Jan 6 12:52:23 2025 |
Stefan Ritt | Problem with C++ script to use DRS4 evaluation board. Not taking data. | 1. Transparent mode is not needed for the hardware trigger, no idea why the code is there. You can probably remove it.
2. EnableTCal is only for the sake of having some waveforms at the input. Indeed you have to disable it to sample real signals.
3. EnableTrigger() is there to enable the hardware trigger. The flag2 is ther for historical reasons (used in older versions of the board).
4. You figured that out already yourself.
5. The functions CalibrateVolt() and CalibrateTiming() are the ones which get called if you click on volt and time calibration in the DRSOsc application. The calibration is store on the evaluation board, so you do not have to call them in your program.
| Matias Henriquez wrote: |
|
Hello, some updates:
4. I was able to capture correct waveforms using c++ code. I needed to use the function SetTriggerDelayNs() to properly capture my waveforms.
5. I noticed that the drsosc program source code uses the functions: CalibrateVolt() and CalibrateTiming() for performing calibration. For these to work, is it necessary to use EnableAcal() and EnableTcal() functions right?
I'd appreciate if you can still give some insights about 1,2 and 3. Thank you!
| Matias Henriquez wrote: |
|
Hello,
I need to write a script in C++ to take data using the DRS4 evaluation board v4. For that, I used the drs_exam.cpp example as a reference. This is my code (see attachement 2), which is very similar to the provided example, however the difference is that I need to trigger on CH1 OR CH2. In the next version I will need to trigger with an OR in all channels.
The problem is, my code gets stuck in waiting for trigger or only 1 event occurs (event 0). I read that event and it doesn't even go above 30mV, which was the threshold I set. There are some questions I have:
- Why Transparent mode is activated for Hardware Trigger?
- Why EnableTCal is activated? is the drs4_exam example based acquires the 100MHz reference just for the sake of the example? or is just a time calibration routine?
- Can someone explain the function EnableTrigger(flag1,flag2) in boardType 8? it si not clear to me how the trigger is enabled.
- To check that my input signals are correct, I run the drsosc application and I can see the signals with no problem (see attachement 1). However I noticed that I had to configure the trigger delay in the drsosc application, and I don't do that in my c++ code. I will try that later.
- How do I perform voltage calibration and time calibration using the c++ functions?
Thank you so much for your help.
|
|
|
|
912
|
Fri Dec 27 22:04:48 2024 |
Matias Henriquez | Problem with C++ script to use DRS4 evaluation board. Not taking data. | Hello, some updates:
4. I was able to capture correct waveforms using c++ code. I needed to use the function SetTriggerDelayNs() to properly capture my waveforms.
5. I noticed that the drsosc program source code uses the functions: CalibrateVolt() and CalibrateTiming() for performing calibration. For these to work, is it necessary to use EnableAcal() and EnableTcal() functions right?
I'd appreciate if you can still give some insights about 1,2 and 3. Thank you!
| Matias Henriquez wrote: |
|
Hello,
I need to write a script in C++ to take data using the DRS4 evaluation board v4. For that, I used the drs_exam.cpp example as a reference. This is my code (see attachement 2), which is very similar to the provided example, however the difference is that I need to trigger on CH1 OR CH2. In the next version I will need to trigger with an OR in all channels.
The problem is, my code gets stuck in waiting for trigger or only 1 event occurs (event 0). I read that event and it doesn't even go above 30mV, which was the threshold I set. There are some questions I have:
- Why Transparent mode is activated for Hardware Trigger?
- Why EnableTCal is activated? is the drs4_exam example based acquires the 100MHz reference just for the sake of the example? or is just a time calibration routine?
- Can someone explain the function EnableTrigger(flag1,flag2) in boardType 8? it si not clear to me how the trigger is enabled.
- To check that my input signals are correct, I run the drsosc application and I can see the signals with no problem (see attachement 1). However I noticed that I had to configure the trigger delay in the drsosc application, and I don't do that in my c++ code. I will try that later.
- How do I perform voltage calibration and time calibration using the c++ functions?
Thank you so much for your help.
|
|
|
911
|
Mon Dec 23 19:31:31 2024 |
Matias Henriquez | Trigger OUT pulse width variable from 100 us up to 100 ms | Given this new scenario, what is the maximum rate of events that can be processed then (a rough estimation would be great, 1/2ms?)? is it mainly limited by the USB data transmission and the PC? How does the logic of the trigger and DRS4 data sampling works inside the FPGA in general terms? e.g: trigger activated -> dwrite ON -> ADC acquisition -> busy until data has been shipped off to the PC -> free to process new events.
Is there a way to obtain some sort of timestamp for the trigger on each event? or is it better to use C++ time functions in the PC since the DRS4 is usually used in experiments with low rate of events so the long time it takes to the USB and PC is not a problem? (eg. particle physics).
Thanks for your help,
Matias H.
| Stefan Ritt wrote: |
|
The "Trigger OUT" has changed recently. It goes high on a new trigger, but then STAYS high until the board has been read out by the PC and re-started. This allows better synchronization with some external trigger, which can be re-armed with the falling edge of the trigger out signal. The signal can be quite long, since readout of an event via USB typically takes 2 ms, but can be more if the PC is busy. If you need back your 150 ns pulse, send the trigger out to an external pulse shaper with fixed shaping width.
Stefan
| Gerard Arino-Estrada wrote: |
|
Hello Stefan,
I am using the DRS4 board connected to a Raspberry PI and through the drsosc application. I am interested on using the "Trigger OUT" signal to do some extra data processing with NIM modules. According to the manual, for each hardware trigger a TTL pulse of 150 ns width should be send through the "trigger OUT". In my case I do see pulses with widths ranging from 100 microseconds up to hundreds of miliseconds. I am connecting the signal directly to an oscilloscope with 50 Ohm termination. I have tried two DRS4 boards in identical conditions and both show the same behavior. Having such wide and variable pulses makes it complicated for me to do the extra post-processing. Have you any idea of what might be going wrong? Thank you very much.
Best regards,
Gerard
|
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|
|
910
|
Fri Dec 20 20:35:31 2024 |
Matias Henriquez | Problem with C++ script to use DRS4 evaluation board. Not taking data. | Hello,
I need to write a script in C++ to take data using the DRS4 evaluation board v4. For that, I used the drs_exam.cpp example as a reference. This is my code (see attachement 2), which is very similar to the provided example, however the difference is that I need to trigger on CH1 OR CH2. In the next version I will need to trigger with an OR in all channels.
The problem is, my code gets stuck in waiting for trigger or only 1 event occurs (event 0). I read that event and it doesn't even go above 30mV, which was the threshold I set. There are some questions I have:
- Why Transparent mode is activated for Hardware Trigger?
- Why EnableTCal is activated? is the drs4_exam example based acquires the 100MHz reference just for the sake of the example? or is just a time calibration routine?
- Can someone explain the function EnableTrigger(flag1,flag2) in boardType 8? it si not clear to me how the trigger is enabled.
- To check that my input signals are correct, I run the drsosc application and I can see the signals with no problem (see attachement 1). However I noticed that I had to configure the trigger delay in the drsosc application, and I don't do that in my c++ code. I will try that later.
- How do I perform voltage calibration and time calibration using the c++ functions?
Thank you so much for your help.
|
| Attachment 1: 1.png
|
|
| Attachment 2: drs_test.cpp
|
/********************************************************************\
Name: drs_exam.cpp
Created by: Stefan Ritt
Contents: Simple example application to read out a DRS4
evaluation board
$Id: drs_exam.cpp 21308 2014-04-11 14:50:16Z ritt $
\********************************************************************/
#include <math.h>
#ifdef _MSC_VER
#include <windows.h>
#elif defined(OS_LINUX)
#define O_BINARY 0
#include <unistd.h>
#include <ctype.h>
#include <sys/ioctl.h>
#include <errno.h>
#define DIR_SEPARATOR '/'
#endif
#include <stdio.h>
#include <string.h>
#include <stdlib.h>
#include "strlcpy.h"
#include "DRS.h"
/*------------------------------------------------------------------*/
int main()
{
int i, j, nBoards;
DRS *drs;
DRSBoard *b;
float time_array[8][1024];
float wave_array[8][1024];
FILE *f;
double domino_freq = 2; //Domino Ring Frequency = 2GHz
double trigger_level_ch1 = 0.03; // Trigger level for channel 1
double trigger_level_ch2 = 0.03; // Trigger level for channel 2
//double trigger_level_ch3 = 0.01; // Trigger level for channel 3
//double trigger_level_ch4 = 0.01; // Trigger level for channel 4
int trigger_source_reg = (1<<0) + (1<<1);
//int trigger_source_reg = (1<<0) + (1<<1) + (1<<2) + (1<<3);
/* do initial scan */
drs = new DRS();
/* show any found board(s) */
for (i=0 ; i<drs->GetNumberOfBoards() ; i++) {
b = drs->GetBoard(i);
printf("Found DRS4 evaluation board, serial #%d, firmware revision %d\n",
b->GetBoardSerialNumber(), b->GetFirmwareVersion());
}
/* exit if no board found */
nBoards = drs->GetNumberOfBoards();
if (nBoards == 0) {
printf("No DRS4 evaluation board found\n");
return 0;
}
/* continue working with first board only */
b = drs->GetBoard(0);
/* initialize board */
b->Init();
/* set sampling frequency */
b->SetFrequency(domino_freq, true);
/* enable transparent mode needed for analog trigger */
b->SetTranspMode(0);
/* set input range to -0.5V ... +0.5V */
//b->SetInputRange(0.5);
/* use following line to set range to 0..1V */
b->SetInputRange(0.45);
/* use following line to turn on the internal 100 MHz clock connected to all channels */
//b->EnableTcal(1);
/* use following lines to enable hardware trigger on */
if (b->GetBoardType() >= 8) { // Evaluaiton Board V4&5
b->EnableTrigger(1, 0); // enable hardware trigger
//b->SetTriggerSource(1<<0);
} else if (b->GetBoardType() == 7) { // Evaluation Board V3
b->EnableTrigger(0, 1); // lemo off, analog trigger on
//b->SetTriggerSource(0);
}
//b->SetTriggerLevel(0.05); // 0.05 V
b->SetTriggerPolarity(false); // positive edge
/* use following lines to set individual trigger elvels */
b->SetIndividualTriggerLevel(1, trigger_level_ch1);
b->SetIndividualTriggerLevel(2, trigger_level_ch2);
//b->SetIndividualTriggerLevel(3, trigger_level_ch3);
//b->SetIndividualTriggerLevel(4, trigger_level_ch4);
//Set Trigger Configuration
// OR Bit0 = CH1, Bit1 = CH2, Bit2 = CH3, Bit3 = CH4, Bit4 = EXT
// AND Bit8 = CH1, Bit9 = CH2, Bit10 = CH3, Bit11 = CH4, Bit12 = EXT
// TRANSP Bit15
b->SetTriggerSource(trigger_source_reg);
b->SetTriggerDelayNs(0); // zero ns trigger delay
/* use following lines to enable the external trigger */
//if (b->GetBoardType() == 8) { // Evaluaiton Board V4
// b->EnableTrigger(1, 0); // enable hardware trigger
// b->SetTriggerSource(1<<4); // set external trigger as source
//} else { // Evaluation Board V3
// b->EnableTrigger(1, 0); // lemo on, analog trigger off
// }
/* open file to save waveforms */
f = fopen("data.txt", "w");
if (f == NULL) {
perror("ERROR: Cannot open file \"data.txt\"");
return 1;
}
/* repeat ten times */
for (j=0 ; j<10 ; j++) {
/* start board (activate domino wave) */
b->StartDomino();
/* wait for trigger */
printf("Waiting for trigger...");
fflush(stdout);
while (b->IsBusy());
/* read all waveforms */
b->TransferWaves(0, 8);
/* read time (X) array of first channel in ns */
b->GetTime(0, 0, b->GetTriggerCell(0), time_array[0]);
/* decode waveform (Y) array of first channel in mV */
b->GetWave(0, 0, wave_array[0]);
/* read time (X) array of second channel in ns
Note: On the evaluation board input #1 is connected to channel 0 and 1 of
the DRS chip, input #2 is connected to channel 2 and 3 and so on. So to
get the input #2 we have to read DRS channel #2, not #1. */
b->GetTime(0, 2, b->GetTriggerCell(0), time_array[1]);
/* decode waveform (Y) array of second channel in mV */
b->GetWave(0, 2, wave_array[1]);
/* Save waveform: X=time_array[i], Yn=wave_array[n][i] */
fprintf(f, "Event #%d ----------------------\n t1[ns] u1[mV] t2[ns] u2[mV]\n", j);
for (i=0 ; i<1024 ; i++)
fprintf(f, "%7.3f %7.1f %7.3f %7.1f\n", time_array[0][i], wave_array[0][i], time_array[1][i], wave_array[1][i]);
/* print some progress indication */
printf("\rEvent #%d read successfully\n", j);
}
fclose(f);
/* delete DRS object -> close USB connection */
delete drs;
}
|
|
909
|
Fri Jun 28 23:33:51 2024 |
Patricia Lecomti | Error when running drsosc | Salut !
Je vois que tu rencontres un petit problème avec ton installation. Le message "Gtk-Message: Failed to load module 'canberra-gtk-module'" indique que ton système essaie de charger un module GTK spécifique qui n'est pas installé. Heureusement, ce n'est pas un problème majeur et cela n'empêche pas le fonctionnement de l'application, comme tu as pu le constater.
Pour résoudre ce message d'erreur, tu peux installer le module manquant. Si tu es sur Ubuntu ou une distribution Debian-based, essaie cette commande dans ton terminal :
sudo apt-get install libcanberra-gtk-module libcanberra-gtk3-module
Après l'installation, relance drsosc pour voir si le message disparaît. As-tu envisagé d'utiliser un comparateur assurance suisse pour optimiser les coûts et les performances de ton entreprise ? Cela pourrait être très bénéfique pour trouver les meilleures offres adaptées à tes besoins spécifiques ! Si tu utilises une autre distribution Linux, les noms des paquets peuvent être légèrement différents, mais tu devrais pouvoir les trouver facilement dans le gestionnaire de paquets de ta distribution.
N'hésite pas à revenir si tu as d'autres questions ou problèmes ! Bon courage avec ton projet.
À bientôt !
| Rebecca Hicks wrote: |
|
Hi, I'm a student trying to figure out the DRS4 board. I cloned the github repo, but when I run drsosc, I get an error: Gtk-Message: 10:06:38.376: Failed to load module "canberra-gtk-module". I'm not sure what that means. The oscilloscope window does open up for me though. Thanks for any help!
|
|
|
908
|
Tue May 21 18:13:08 2024 |
Rebecca Hicks | Error when running drsosc | Hi, I'm a student trying to figure out the DRS4 board. I cloned the github repo, but when I run drsosc, I get an error: Gtk-Message: 10:06:38.376: Failed to load module "canberra-gtk-module". I'm not sure what that means. The oscilloscope window does open up for me though. Thanks for any help! |
|
907
|
Thu Feb 22 10:37:03 2024 |
Stefan Ritt | Simulation of FPGA | The Cypress has its own firmware, contained in the distribution under firmware/CY7C68013A/drs_eval.c. There you can see how the data is fetched. I kind of forgot how exactly it worked, since I wrote that code back in 2011. But most if the Cypress code is just the configuration of the USB, the communication with the FPGA is kind of straight forward in the Cypress implementation. But you have to read the manual of that chip to understand it.
Unfrtunately there is no full testbench for the firmware, since I didn't have a VHDL Model of the Cypress, so I implemente dit the "hard" way ;-)
Best,
Stefan
| Rod McInnis wrote: |
|
Hello:
A bit of background: I am working on a project that is utilizing the DRS4 Evaluation board as a prototype platform for a dedicated, special use capture. We will only be utilizing one channel of the ADC capture, and the 1024 samples is more than enough.
What I will need to do, however, is do some preprocessing on the incoming ADC data, running some calculation on the fly, possibly some filtering and other transformations before putting the data into the FPGA block memory for transfer to the host via the Cypress USB interface. I will be modifying the "drs4_eval5" VHDL file and doing a new FPGA build.
It will be essential that I be able to simulate this, from the ADC input to the data flow to the Cypress chip. I have "eval board files" which includes the VHDL source files, Xilinxe ISE project files and some very basic simulation testbenches.
Unfortunately, the simulation testbenches call out a "drs4_eval1" module while the Xilinx project uses a "drs4_eval5" module, and the module ports are a little different. I think I can work around that, however. I have run the simulatilon "drs4_eval1_tb", which does a simple write to a Control Register. I need to expand this simulation so that it will initiate a full capture and then transfer the data from the RAM to the Cypress chip.
What I am most confused about is how the Cypress chip sucks out the data from the FPGA block ram. I would expect it to use a burst mode data transfer rather than the cumbersom CSR read/write, but I haven't found any documentation on how this interface works.
Q1: Is there a simulation testbench file available that does the 1024 sample data transfer?
Q2: Is there a waveform diagram that shows the protocol / signal handshake between the FPGA and Cypress chip for this data transfer?
Thank you
Rod McInnis
|
|
|
906
|
Thu Feb 22 01:21:11 2024 |
Rod McInnis | Simulation of FPGA | Hello:
A bit of background: I am working on a project that is utilizing the DRS4 Evaluation board as a prototype platform for a dedicated, special use capture. We will only be utilizing one channel of the ADC capture, and the 1024 samples is more than enough.
What I will need to do, however, is do some preprocessing on the incoming ADC data, running some calculation on the fly, possibly some filtering and other transformations before putting the data into the FPGA block memory for transfer to the host via the Cypress USB interface. I will be modifying the "drs4_eval5" VHDL file and doing a new FPGA build.
It will be essential that I be able to simulate this, from the ADC input to the data flow to the Cypress chip. I have "eval board files" which includes the VHDL source files, Xilinxe ISE project files and some very basic simulation testbenches.
Unfortunately, the simulation testbenches call out a "drs4_eval1" module while the Xilinx project uses a "drs4_eval5" module, and the module ports are a little different. I think I can work around that, however. I have run the simulatilon "drs4_eval1_tb", which does a simple write to a Control Register. I need to expand this simulation so that it will initiate a full capture and then transfer the data from the RAM to the Cypress chip.
What I am most confused about is how the Cypress chip sucks out the data from the FPGA block ram. I would expect it to use a burst mode data transfer rather than the cumbersom CSR read/write, but I haven't found any documentation on how this interface works.
Q1: Is there a simulation testbench file available that does the 1024 sample data transfer?
Q2: Is there a waveform diagram that shows the protocol / signal handshake between the FPGA and Cypress chip for this data transfer?
Thank you
Rod McInnis
|
|
905
|
Wed Oct 25 19:52:33 2023 |
John Westmoreland | WaveDREAM Design | Stefan,
Oh, didn't realize that.
Thanks!
John
| Stefan Ritt wrote: |
|
No. This is a proprietary design.
Best,
Stefan
|
|
|
904
|
Wed Oct 25 19:47:23 2023 |
Stefan Ritt | WaveDREAM Design | No. This is a proprietary design.
Best,
Stefan |
|
903
|
Wed Oct 25 19:44:25 2023 |
John Westmoreland | WaveDREAM Design | Hello All,
Are there any design resources available for the WaveDREAM PCBA's?
Thanks In Advance,
John W. |
|
902
|
Wed Sep 13 13:18:45 2023 |
Stefan Ritt | Input range switch added in Version 2.1.3 | To achieve an input range of -1V to 0V, you need an external buffer which can shift this range into the DRS4 range of -0.5V to +0.5V. This external buffer has then to operate with bipolar power supplies, like -2.5V to +2.5V, which are not present on the evaluation board.
Best regards,
Stefan |
|
901
|
Tue Sep 5 03:28:52 2023 |
Matias Henriquez | Input range switch added in Version 2.1.3 | Hello,
It is not quite clear to me yet how the input range is only determined by the front end and not the DRS4 chip. According to the datasheet, the selection of ROFS determines whether the input differential range is -0.5V to 0.5V (ROFS=1.55V) or 0V to 1V (ROFS=1.05V) or -0.05V to 0.95V (ROFS=1.1V).
As far as I understand, the input differential voltage cannot go further below -0.55V since the maximum ROFS voltage is 1.6V according to the datasheet).
Also in the DRS4 evaluation board 5.1 design, the output of the differential amplifier is AC coupled to the DRS4 chip.
I'd appreciate a lot your help.
Regards,
Matias
| Stefan Ritt wrote: |
|
A new software verison for the DRS4 Evaluation Board has been has been released. Version 2.1.3 adds a switch for the input range of the DRS4 board. Once can choose between -0.5V...0.5V and 0V...1V:
A board firmware update is not necessary for this. It was originally planned to have even a negative range -1V...0V, but this is not possible with the current board design. People who want to record negative pulses have to use an inverter to produce positive pulses. In a future version of the board it might be possible to include this functionality since this is determined by the analog front-end and not the DRS4 chip.
|
|
|
899
|
Mon Jun 12 14:22:04 2023 |
Stefan Ritt | Different sampling rates in multi-board configuration | No, that's unfortunately not possible.
Stefan
| Javier Caravaca wrote: |
|
Hello,
Is it possible to have different sampling rates in multi-board configuration? I tried using the scope application but I am unable to change the sampling rate independently.
Best,
Javier.
|
|
|
898
|
Fri Jun 9 04:11:40 2023 |
Javier Caravaca | Different sampling rates in multi-board configuration | Hello,
Is it possible to have different sampling rates in multi-board configuration? I tried using the scope application but I am unable to change the sampling rate independently.
Best,
Javier. |
|
897
|
Mon Feb 6 13:28:28 2023 |
Stefan Ritt | DRS4 installation via tar in ubuntu not working | I fixed the described error. Can you try the new version from https://bitbucket.org/ritt/drs4eb/commits/80b3af753ed32eb365725f0f3244a4109347c01b
| Sebastian Infante wrote: |
|
Hello i cant install any the last versions that i downloaded from the dropbox, i can untar the file called drs-5.0.6 and when i type "make" while inside the extracted folder that starts working properly till a point and i get an error, its worth mention that i installed wxWidgets and could make a simple hello world that worked properly in wxWidgets.
The error that i get is the next one:
inlined from ‘bool ResponseCalibration::ReadCalibrationV4(unsigned int)’ at src/DRS.cpp:7224:35:
/usr/include/x86_64-linux-gnu/bits/string_fortified.h:95:34: warning: ‘char* __builtin___strncpy_chk(char*, const char*, long unsigned int, long unsigned int)’ specified bound depends on the length of the source argument [-Wstringop-truncation]
95 | return __builtin___strncpy_chk (__dest, __src, __len,
| ~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~
96 | __glibc_objsize (__dest));
| ~~~~~~~~~~~~~~~~~~~~~~~~~
src/DRS.cpp: In member function ‘bool ResponseCalibration::ReadCalibrationV4(unsigned int)’:
src/DRS.cpp:4767:11: note: length computed here
4767 | strncpy(calibrationDirectoryPath, fCalibDirectory, strlen(fCalibDirectory));
| ~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
In file included from /usr/include/string.h:535,
from /usr/local/include/wx-3.3/wx/string.h:30,
from /usr/local/include/wx-3.3/wx/memory.h:15,
from /usr/local/include/wx-3.3/wx/object.h:19,
from /usr/local/include/wx-3.3/wx/wx.h:15,
from src/DRS.cpp:15:
In function ‘char* strncpy(char*, const char*, size_t)’,
inlined from ‘void DRSBoard::GetCalibrationDirectory(char*)’ at src/DRS.cpp:4767:11,
inlined from ‘bool ResponseCalibration::ReadCalibrationV3(unsigned int)’ at src/DRS.cpp:7066:35:
/usr/include/x86_64-linux-gnu/bits/string_fortified.h:95:34: warning: ‘char* __builtin___strncpy_chk(char*, const char*, long unsigned int, long unsigned int)’ specified bound depends on the length of the source argument [-Wstringop-truncation]
95 | return __builtin___strncpy_chk (__dest, __src, __len,
| ~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~
96 | __glibc_objsize (__dest));
| ~~~~~~~~~~~~~~~~~~~~~~~~~
src/DRS.cpp: In member function ‘bool ResponseCalibration::ReadCalibrationV3(unsigned int)’:
src/DRS.cpp:4767:11: note: length computed here
4767 | strncpy(calibrationDirectoryPath, fCalibDirectory, strlen(fCalibDirectory));
| ~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
g++ -g -O2 -Wall -Wuninitialized -fno-strict-aliasing -Iinclude -I/usr/local/include -DOS_LINUX -DHAVE_USB -DHAVE_LIBUSB10 -DUSE_DRS_MUTEX -I/usr/local/lib/wx/include/gtk3-unicode-3.3 -I/usr/local/include/wx-3.3 -D_FILE_OFFSET_BITS=64 -DWXUSINGDLL -D__WXGTK__ -pthread -c src/averager.cpp
g++ -g -O2 -Wall -Wuninitialized -fno-strict-aliasing -Iinclude -I/usr/local/include -DOS_LINUX -DHAVE_USB -DHAVE_LIBUSB10 -DUSE_DRS_MUTEX -I/usr/local/lib/wx/include/gtk3-unicode-3.3 -I/usr/local/include/wx-3.3 -D_FILE_OFFSET_BITS=64 -DWXUSINGDLL -D__WXGTK__ -pthread -c src/ConfigDialog.cpp
In file included from include/DRSOscInc.h:25,
from src/ConfigDialog.cpp:7:
include/DOFrame.h: In member function ‘bool DOFrame::GetRefclk()’:
include/DOFrame.h:111:46: error: ordered comparison of pointer with integer zero (‘bool*’ and ‘int’)
111 | bool GetRefclk() { return m_refClk > 0; }
| ~~~~~~~~~^~~
make: *** [Makefile:81: ConfigDialog.o] Error 1
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896
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Mon Oct 24 12:50:24 2022 |
Stefan Ritt | Channel Cascading Option in the 2048-bin | The board is delivered in one or the other mode and not meant to be changed by the user, since this requires very delicate soldering which is not easy. If you try anyhow, you loose the quarantee. You can send the board back to the manufacturer for the modification, but this costs quite some moeny.
Best regards,
Stefan
| Phan Van Chuan wrote: |
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Dear Stefan,
We are using DRS4 evaluation board version 5.1 and firmware version 30000 (as the picture attached). Now, I am in need one channel with length 2048 bin. However, I can't find the resistors R99, ... ,R106 on the hardware of evaluation board; it seems my DRS4 evaluation board doesn't use 2048 bins per channel.
Our question is, can we repair this hardware to read 2048 bins/channel? if that is possible please let me know what to add on hardware/software of DRS4 evaluation.
Best regards.
Phan Van Chuan.
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