ID |
Date |
Author |
Subject |
Text |
|
413
|
Wed May 13 09:45:51 2015 |
Stefan Ritt | transparent-mode voltage | The ROFS signal has no effect in the transparent
mode, so you have to adjust O_OFS between
sampling and transparent mode accordingly. |
|
415
|
Wed May 13 10:16:40 2015 |
Stefan Ritt | transparent-mode voltage | I see your point. Actually I will soon
have the same issue since we design right
now a board with an AD9637 using the transparent |
|
417
|
Wed May 13 12:34:49 2015 |
Stefan Ritt | transparent-mode voltage | There might be a solution. How do you bias
th input of the
DRS4 chip? If you use a scheme as described |
|
420
|
Wed May 13 16:25:24 2015 |
Stefan Ritt | transparent-mode voltage | To get the good linearity, you need indeed
ROFS = 1.05V. With a O-OFS of 0.9V, a zero
input signal would give you DRS_OUT+=1.05V |
|
422
|
Fri May 22 14:25:45 2015 |
Stefan Ritt | DRS4 firmware UCF constraints | > Hello, I'm using two DRS4 rev.5 boards for
8ch readout and triggering.
>
|
|
426
|
Wed Jun 3 09:07:38 2015 |
Stefan Ritt | Peculiar behavior of time values for Rev5 DRS4 EB | First of all, you should not use new boards
with old software. I try to keep the current
software compatible with old boards, but |
|
427
|
Fri Jun 5 12:07:38 2015 |
Stefan Ritt | DRS4 firmware UCF constraints | I presume you have several evaluation boards
and want to run them in sync, right?
|
|
429
|
Fri Jun 5 13:29:55 2015 |
Stefan Ritt | DRS4 firmware UCF constraints | Do the following:
Use the TRG OUT of the evaluation board as |
|
430
|
Fri Jun 5 13:32:03 2015 |
Stefan Ritt | DRS4 firmware UCF constraints | Actually we should take this offline not to
pester other DRS users which are not interested
in this topic. Please call me directly (3728) |
|
432
|
Tue Jun 16 22:26:41 2015 |
Stefan Ritt | DRS4 Evaluation Board Osc Application | There is a horizontal position slider in
the "Horizontal" box on the right
side below the trigger delay. Use it. |
|
437
|
Fri Jul 3 17:13:27 2015 |
Stefan Ritt | Creation of Object files | Hi Felix,
the distribution does not contain
any binaries, since there are too many Linux |
|
439
|
Mon Jul 6 19:25:27 2015 |
Stefan Ritt | Creation of Object files | Anyhow it would be nice if you just post
your Makefile here, which runs with the standard
distribution, so people can use it if needed. |
|
442
|
Thu Jul 23 13:46:12 2015 |
Stefan Ritt | Measure the time between different samples | > Hi,
> I have a question using a data acquisition
card base on DRS4 chip. How can I measure |
|
449
|
Wed Nov 4 15:40:10 2015 |
Stefan Ritt | Latest macro for DRS4 V5 | Have a look here: elog:361
|
|
452
|
Wed Nov 25 08:20:47 2015 |
Stefan Ritt | PC software beyond Windows 7 | Have a look here elog:434
|
|
458
|
Wed Dec 23 15:48:42 2015 |
Stefan Ritt | Dtap stops toggling after 40msec | No idea what you do wrong. I need to see
oscilloscope traces for all your inputs and
voltages. What is your REFCLK input? |
|
460
|
Thu Dec 24 12:45:41 2015 |
Stefan Ritt | Dtap stops toggling after 40msec | I want to see the trace on the scope for
the DTAP, the REFCLK, the DENABLE and the
DWRITE. |
|
463
|
Mon Dec 28 11:05:15 2015 |
Stefan Ritt | Dtap stops toggling after 40msec | Thanks for posting the plots. It really
looks like the PLL is not working. I see
two possible reasons: 1) The PLLEN bit in |
|
466
|
Wed Dec 30 17:00:00 2015 |
Stefan Ritt | Dtap stops toggling after 40msec | While I can understand 1., I'm puzzeled
by 2.
If you put the chip in standby |
|
468
|
Tue Jan 12 12:57:46 2016 |
Stefan Ritt | PC software beyond Windows 7 | The 5.0.4 version was corrupt on our server.
I fixed it, so now it shoudl also work fine
(although there are only very minor changes |
|