| ID |
Date |
Author |
Subject |
Text |
 |
|
598
|
Tue Apr 11 09:07:33 2017 |
Giovanni Bruni | drs4 registers behaviour | Thank you Stefan for replying!
I have still the RESET issue in mind:
how would you suggest to reset properly the |
|
|
597
|
Mon Apr 10 14:05:17 2017 |
Stefan Ritt | drs4 registers behaviour | 1. WRITE SHIFT register and CONFIG registers
are initialized to "1" on power
up, but if you want to change that, use A0-A3 |
|
|
596
|
Mon Apr 10 13:41:41 2017 |
Giovanni Bruni | drs4 registers behaviour | Hej Stefan! Thank you for your answer!
Just to be sure to have understood
properly: |
|
|
595
|
Mon Apr 10 10:50:57 2017 |
Stefan Ritt | drs4 registers behaviour | Using the RESET line to reset registers
is not a good idea since it can have some
bad side-effects. The READ SHIFT register |
|
|
594
|
Mon Apr 10 10:48:03 2017 |
Stefan Ritt | DRS4 eval board v4 coincidence firmware changes for triger for short pulses | You have to download the package for your
board, which then includes also the correct
firmware for your board. If you have a V4 |
|
|
593
|
Mon Apr 10 08:50:11 2017 |
Giovanni Bruni | drs4 registers behaviour | Hej everyone!
I have some questions regarding what
happens to some DRS registers in some scenarios: |
|
|
592
|
Wed Apr 5 12:40:16 2017 |
Martin Petriska | DRS4 eval board v4 coincidence firmware changes for triger for short pulses | I would like to implement fpga firmware
changes for DRS4 eval board v4 to put there
posibility for standard coincidence (for |
|
|
591
|
Wed Apr 5 12:28:28 2017 |
Stefan Ritt | drscl doesn't find eval board but drsosc does (Windows 7) | Two people report now this problem, while
this works fine at our lab. So I'm puzzled
right now. |
|
|
590
|
Tue Mar 28 21:53:12 2017 |
Jim Freeman | drscl doesn't find eval board but drsosc does (Windows 7) | I cannot find the EVAL board using drscl
version 5.06 while the drsosc works fine.
I tried 2 different eval boards and 2 different |
|
|
589
|
Fri Feb 24 18:35:38 2017 |
Stefan Ritt | Passing parameters to drscl | This is indeed currently not implemented.
But there is a simple C program drs_exam.cpp,
which connects to a board and safes some |
|
|
588
|
Fri Feb 24 17:34:28 2017 |
Tarik Zengin | Passing parameters to drscl | Hi everyone,
I wonder if there is a way to pass
parameters to drscl. What I specifically |
|
|
587
|
Tue Jan 31 08:40:04 2017 |
Stefan Ritt | LLD and ULD discriminations, | Not inside the board. Each channel has
a single discriminator. You can select to
trigger on a rising or falling edge, but |
|
|
586
|
Tue Jan 31 01:37:35 2017 |
VO HONG HAI | LLD and ULD discriminations, | Dear Stefan,
Is there any way to develop
LLD and ULD discrimination in DSR-4 evaluation
board?
Best regards,
V.H.Hai |
|
|
585
|
Mon Jan 30 16:37:33 2017 |
Stefan Ritt | AND trigger problems | In the evaluation board we use an ADCMP601
comparator, which has a setup and hold time
of 4.6 ns. So a pulse which exceeds the threshold |
|
|
584
|
Sat Jan 28 14:11:58 2017 |
Danny Petschke | AND trigger problems | Dear Stefan,
I have 2 identical pulses as a
splittet signal with an amplitude of 300mV. |
|
|
583
|
Fri Jan 13 13:50:10 2017 |
Stefan Ritt | DRS software doesn't work under Windows XP SP3 | Can you try that executable under XP: https://www.dropbox.com/s/j1n09afhbmh0zzu/drsosc.exe?dl=0
|
|
|
582
|
Fri Jan 13 13:16:09 2017 |
Stefan Ritt | DRS software doesn't work under Windows XP SP3 | The error probably comes from the fact
that the drsosc.exe application is a 64-bit
application and cannot be executed under |
|
|
581
|
Fri Jan 13 12:58:22 2017 |
Gregor Kramberger | DRS software doesn't work under Windows XP SP3 | Hi all
I have a problem with running the
DRSOSC under windows XP SP3. We have some |
|
|
580
|
Fri Dec 9 04:17:46 2016 |
Abhishek Rajput | Potential Incorrect Timing Calibration for DRS4 Data | Hello Stefan,
Many thanks for the explanations.
You've cleared my confusion in this matter. |
|
|
579
|
Fri Dec 2 16:47:37 2016 |
Stefan Ritt | DRS4 Initiation | No, I can't think of anything else.
There is no intermediate addressing stage.
The only thing which sometimes happens is |
|