DRS4 Forum
DRS4 Discussion Forum, Page 32 of 46
Not logged in
Find
|
Login
|
Help
Full
|
Summary
| Threaded |
Collapse
|
Expand
903 Entries
Goto page
Previous
1
,
2
,
3
...
31
, 32,
33
...
44
,
45
,
46
Next
Tue Oct 26 12:00:51 2021, Stefan Ritt, External trigger and drs_exam
Tue Oct 26 15:05:18 2021, Mehrpad Monajem, External trigger and drs_exam
Wed Jan 14 12:02:04 2009, Stefan Ritt, External Trigger Input requirements
Wed Jan 14 13:41:44 2009, Stefan Ritt, External Trigger Input requirements
Wed Sep 27 16:11:03 2017, Yoni Sher, Event acquisition pace for irregular timing
Mon Oct 2 16:08:05 2017, Stefan Ritt, Event acquisition pace for irregular timing
Thu Jun 20 01:36:48 2019, Andrew Peck, Evaluation firmware wait_vdd state
Fri Jun 21 12:54:47 2019, Stefan Ritt, Evaluation firmware wait_vdd state
Mon Jun 24 23:07:35 2019, Andrew Peck, Evaluation firmware wait_vdd state
Wed Feb 15 18:08:13 2012, Yuji Iwai, Evaluation Board v4 Trigger/Clock Connectors
Sat Jul 13 01:00:15 2019, Brendan Posehn, Evaluation Board Test Functionality
Mon Jul 15 17:26:50 2019, Stefan Ritt, Evaluation Board Test Functionality
Mon Jul 15 19:34:25 2019, Brendan Posehn, Evaluation Board Test Functionality
Tue Jul 23 22:31:08 2013, alonzi, Evaluation Board Behavior
Tue Jul 23 22:35:08 2013, Stefan Ritt, Evaluation Board Behavior
Tue Jul 23 22:42:31 2013, alonzi, Evaluation Board Behavior
Thu Jul 25 01:31:29 2013, Andrey Kuznetsov, Evaluation Board Behavior
Tue May 21 18:13:08 2024, Rebecca Hicks, Error when running drsosc
Fri Jun 28 23:33:51 2024, Patricia Lecomti, Error when running drsosc
Mon Jul 16 19:39:35 2018, Woon-Seng Choong, Effect of interpolation on timing
Goto page
Previous
1
,
2
,
3
...
31
, 32,
33
...
44
,
45
,
46
Next
ELOG V3.1.5-3fb85fa6