| ID |
Date |
Author |
Subject |
Text |
 |
|
78
|
Wed May 12 11:47:39 2010 |
Jinhong Wang | DRS4 chip model |
|
|
|
91
|
Fri Jun 18 11:31:20 2010 |
Jinhong Wang | DVDD Problem of DRS 4 |
|
|
|
93
|
Sat Jun 19 10:09:18 2010 |
Jinhong Wang | DVDD Problem of DRS 4 |
|
|
|
94
|
Tue Jun 22 10:50:19 2010 |
Jinhong Wang | Reset of DRS4 | Hi Stefan,
I found
DRS draw a lot of current when applied Reset |
|
|
96
|
Tue Jun 22 11:29:26 2010 |
Jinhong Wang | Reset of DRS4 |
|
|
|
98
|
Tue Jun 22 11:37:42 2010 |
Jinhong Wang | Reset of DRS4 |
|
|
|
104
|
Mon Jul 19 12:07:04 2010 |
Jinhong Wang | Fixed Patter Timing Jitter | Hi Stefan, can you give some suggestions
on determination of fixed pattern timing
jitter of DRS4? Thanks~ |
|
|
106
|
Wed Jul 21 10:46:32 2010 |
Jinhong Wang | ENOB of DRS | Hi, Stefan, I see in your ppt "Design
and performance of 6 GSPS waveform digitizing
chip DRS4" , you define DRS4 ENOB as |
|
|
110
|
Tue Oct 12 03:53:37 2010 |
Jinhong Wang | Reference design for DRS4 active input buffer |
|
|
|
121
|
Mon Jul 4 05:06:00 2011 |
Jinhong Wang | Fixed Patter Timing Jitter |
|
|
|
123
|
Tue Jul 12 09:49:08 2011 |
Jinhong Wang | Fixed Patter Timing Jitter |
|
|
|
212
|
Thu Dec 27 00:12:12 2012 |
Jinhong Wang | variation of sampling capacitors | Hi Stefan,
A quick question, what is the typical
variation of the sampling capacitors in DRS4? |
|
|
214
|
Thu Dec 27 18:15:14 2012 |
Jinhong Wang | variation of sampling capacitors |
|
|
|
215
|
Fri Feb 1 17:43:48 2013 |
Jinhong Wang | variation of sampling capacitors |
|
|
|
886
|
Tue Jul 19 02:35:04 2022 |
Jingyu Zhang | Increase event rate, use ROI mode, and install sw from source in Mac | Dear
experts,
|
|
|
590
|
Tue Mar 28 21:53:12 2017 |
Jim Freeman | drscl doesn't find eval board but drsosc does (Windows 7) | I cannot find the EVAL board using drscl
version 5.06 while the drsosc works fine.
I tried 2 different eval boards and 2 different |
|
|
229
|
Tue Mar 26 01:17:59 2013 |
Jill Russek | cascading -- DRS4 Osci.cpp & DRS.cpp |
All I'm trying to do is cascade one
input signal, though all available channels, |
|
|
232
|
Fri Apr 5 02:21:33 2013 |
Jill Russek | cascading -- DRS4 Osci.cpp & DRS.cpp |
|
|
|
235
|
Wed Apr 10 22:41:21 2013 |
Jill Russek | cascading -- DRS4 Osci.cpp & DRS.cpp |
|
|
|
238
|
Thu Apr 11 23:32:57 2013 |
Jill Russek | cascading -- DRS4 Osci.cpp & DRS.cpp |
|
|