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ID Date Author Subject Text   239   Fri Apr 12 08:25:05 2013 Stefan Ritt cascading -- DRS4 Osci.cpp & DRS.cpp   238   Thu Apr 11 23:32:57 2013 Jill Russek cascading -- DRS4 Osci.cpp & DRS.cpp   237   Thu Apr 11 22:41:13 2013 Bill Ashmanskas code/details for optimal DRS4 timing calibration?   236   Thu Apr 11 08:39:12 2013 Stefan Ritt cascading -- DRS4 Osci.cpp & DRS.cpp   235   Wed Apr 10 22:41:21 2013 Jill Russek cascading -- DRS4 Osci.cpp & DRS.cpp   234   Mon Apr 8 18:11:02 2013 Dmitry Hits binary to root   233   Fri Apr 5 08:54:37 2013 Stefan Ritt cascading -- DRS4 Osci.cpp & DRS.cpp   232   Fri Apr 5 02:21:33 2013 Jill Russek cascading -- DRS4 Osci.cpp & DRS.cpp   231   Thu Apr 4 11:32:21 2013 Stefan Ritt cascading -- DRS4 Osci.cpp & DRS.cpp   230   Thu Apr 4 11:21:04 2013 Stefan Ritt Differences in Source Code   229   Tue Mar 26 01:17:59 2013 Jill Russek cascading -- DRS4 Osci.cpp & DRS.cpp   228   Mon Mar 25 11:12:53 2013 Georg Winner Differences in Source Code   227   Wed Mar 6 13:08:03 2013 Stefan Ritt Chip Test - Cell Error   226   Wed Mar 6 12:37:14 2013 Stefan Ritt DRS4- analog pulse counting   225   Wed Mar 6 12:35:38 2013 Osip Lishilin DRS4- analog pulse counting   224   Thu Feb 28 12:58:44 2013 Stefan Ritt clock and trigger outs   223   Thu Feb 28 10:47:14 2013 Dmitry Hits clock and trigger outs   222   Wed Feb 27 13:47:32 2013 Georg Winner Chip Test - Cell Error   220   Fri Feb 22 11:56:57 2013 Stefan Ritt DRS4 trigger, different polarity   219   Fri Feb 22 11:46:17 2013 Yury Golod DRS4 trigger, different polarity

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