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Thu Jan 1 01:00:00 1970
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ID
Date
Author
Subject
Text
832
Mon Sep 6 14:42:23 2021
Jiaolong
how to acquire the stop channel with 2x4096 cascading
Draft
Fri Nov 5 01:10:25 2021
Jiaolong
how to acquire the stop channel with 2x4096 cascading
850
Fri Nov 5 01:12:10 2021
Jiaolong
how to acquire the stop channel with 2x4096 cascading
842
Mon Oct 25 18:48:04 2021
Javier Caravaca
Trigger multiple boards independently
847
Tue Oct 26 23:18:32 2021
Javier Caravaca
Trigger multiple boards independently
898
Fri Jun 9 04:11:40 2023
Javier Caravaca
Different sampling rates in multi-board configuration
851
Tue Nov 16 01:27:51 2021
Jacquelynne Vaughan
V3 board, only one channel works, all components at each channel input working
537
Thu Sep 29 17:26:13 2016
Jacob Hwang
Output Timing Drifting
471
Tue Jan 12 17:57:03 2016
Jack Bargemann
Compiling DRS-exam
164
Wed Jun 20 10:40:21 2012
Ivan Petrov
triger for measuring time between pulses in channels
166
Wed Jun 20 14:36:01 2012
Ivan Petrov
triger for measuring time between pulses in channels
170
Mon Jul 9 14:14:48 2012
Ivan Petrov
Problem compiling drs_exam.cpp on windows
172
Wed Jul 11 10:04:51 2012
Ivan Petrov
Problem compiling drs_exam.cpp on windows
764
Thu Jul 18 01:03:44 2019
Ismael Garcia
Trace Impedance
766
Fri Jul 19 01:37:09 2019
Ismael Garcia
Trace Impedance
421
Tue May 19 14:14:45 2015
Ilja Bekman
DRS4 firmware UCF constraints
Draft
Wed Oct 7 13:06:34 2015
Ilja Bekman
Voltage Calibration with signal on the input
69
Sun May 2 18:36:14 2010
Ignacio Diéguez Estremera
DRS4 chip model
71
Mon May 3 17:06:02 2010
Ignacio Diéguez Estremera
DRS4 chip model
73
Mon May 3 23:21:55 2010
Ignacio Diéguez Estremera
DRS4 chip model
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