DRS4 Forum
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   +  Reply  Fri Oct 25 16:39:07 2019, Stefan Ritt, Computing corrected time from binary data...what is t_0,0? 
   +  Reply  Tue Oct 15 08:14:17 2019, Danyang, how to acquire the stop position with channel cascading 
Entry  Fri Sep 13 15:27:41 2019, Arseny Rybnikov, Scaler / How to modify the firmware to change the scaler integration time 
   +  Reply  Tue Aug 27 09:14:03 2019, Stefan Ritt, DRS4 
   +  Reply  Tue Aug 20 16:05:21 2019, Bill Ashmanskas, should one deassert DENABLE while writing the write-shift register? 
   +  Reply  Sat Jul 20 12:28:14 2019, Stefan Ritt, Trace Impedance 
   +  Reply  Mon Jul 15 19:34:25 2019, Brendan Posehn, Evaluation Board Test Functionality 
   +  Reply  Mon Jul 8 14:29:12 2019, Stefan Ritt, drs_exam is always reading out a sin wave 
   +  Reply  Wed Jun 26 15:17:51 2019, Si Xie, Running drs_example.cpp 
   +  Reply  Mon Jun 24 23:07:35 2019, Andrew Peck, Evaluation firmware wait_vdd state 
   +  Reply  Fri Apr 12 12:50:18 2019, Stefan Ritt, multi-board 
Entry  Thu Mar 14 03:43:49 2019, Deepak Samuel, How to buy DRS evaluation kit 
Entry  Fri Mar 8 19:35:11 2019, Abaz Kryemadhi, ROOT Macro for newest software read_binary.C
Entry  Wed Mar 6 10:09:01 2019, Willy Chang, drscl "no board found" in some Win7 or Win8.X PCs 
   +  Reply  Mon Feb 25 08:48:27 2019, Stefan Ritt, no board found 
   +  Reply  Mon Feb 4 18:18:22 2019, Stefan Ritt, Different Distances between the sampling points 
   +  Reply  Sat Feb 2 10:10:22 2019, Stefan Ritt, Saving Rate (only 15Acq/s) 
   +  Reply  Wed Jan 30 17:08:58 2019, Stefan Ritt, ROOT Macro for data acquired with the newest software 
   +  Reply  Wed Jan 30 08:02:25 2019, Stefan Ritt, DRS4 domino wave stability study 
   +  Reply  Thu Nov 8 12:02:34 2018, Davide Depaoli, Timing Issue 
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