ID |
Date |
Author |
Subject |
Text |
 |
907
|
Thu Feb 22 10:37:03 2024 |
Stefan Ritt | Simulation of FPGA | The Cypress has its own firmware, contained
in the distribution under firmware/CY7C68013A/drs_eval.c.
There you can see how the data is fetched. |
|
913
|
Mon Jan 6 12:52:23 2025 |
Stefan Ritt | Problem with C++ script to use DRS4 evaluation board. Not taking data. | 1. Transparent mode is not needed for the
hardware trigger, no idea why the code is
there. You can probably remove it. |
|
915
|
Wed Mar 26 08:42:08 2025 |
Stefan Ritt | drs_exam.cpp not compile | You have to link against the DRS.cpp library,
plus usblib, plus ... Note there is both
a Makefile and a CMakeLists.txt for it. Google |
|
920
|
Fri May 9 08:17:50 2025 |
Stefan Ritt | Handling of Write Shift Register and Write Config Register | This is correct. Setting A0-A3 to 0b1101
multiplexes the Shift Write Register to SROUT,
so you will either a "0" or a "1" |
|
921
|
Fri May 9 08:26:17 2025 |
Stefan Ritt | Clarification of full channel readout | The full readout mode is not really recommended
since you have to pull out the stop position
separately. Just do the ROI readout using |
|
923
|
Tue May 13 08:51:34 2025 |
Stefan Ritt | Handling of Write Shift Register and Write Config Register | Yes this is correct. Anyhow, even if it
would be working, you would not be happy
with it. After having designed ~10 boards |
|
156
|
Wed Feb 29 06:46:47 2012 |
Sonal | DRS4- analog pulse counting |
|
|
679
|
Mon Apr 16 21:21:29 2018 |
Sobimpe Eniola | DRS4 read_binary.cpp | Hello everyone,
The new read_binary.cpp code
I will be very glad if anyone can |
|
386
|
Wed Oct 15 10:14:32 2014 |
Simon Weingarten | Clock settings in daisy chain DAQ | Hi,
I'm currently working on a little
DAQ system with four DRS evaluation boards. |
|
388
|
Wed Oct 15 11:34:43 2014 |
Simon Weingarten | Clock settings in daisy chain DAQ |
|
|
403
|
Fri Apr 17 10:07:38 2015 |
Simon Weingarten | Clock settings in daisy chain DAQ | Hi Stefan,
do you know how these numbers (400ps
and 60ps) scale with the sampling rate? The |
|
551
|
Fri Oct 28 15:02:18 2016 |
Simon Mendisch | Problems with DRS command line | [quote="Stefan Ritt"]
You are the first one describing this problem
(out of ~200 people), so I guess the problem |
|
756
|
Tue Jun 25 23:04:29 2019 |
Si Xie | drs_exam is always reading out a sin wave | We are using the drs_exam.cpp to read out
waveforms, but it seems to be outputting
only sin waves on all channels - as if it |
|
758
|
Wed Jun 26 15:10:09 2019 |
Si Xie | drs_exam is always reading out a sin wave | I see. Where is the code that we can use
to turn off the generator? I thought the
example is taking data with CH1 as the trigger. |
|
759
|
Wed Jun 26 15:17:51 2019 |
Si Xie | Running drs_example.cpp | Hi Rodrigo, I'm wondering how you solved
your original triggering problem. We are
also having trouble with collecting data |
|
800
|
Wed Oct 21 15:03:13 2020 |
Seiya Nozaki | Timing diagram of SROUT/SRIN signal to write/read a write shift register | Dear Stefan,
I have questions about the timing |
|
802
|
Tue Oct 27 15:02:09 2020 |
Seiya Nozaki | Timing diagram of SROUT/SRIN signal to write/read a write shift register | Dear Stefan,
Thank you for your reply. |
|
804
|
Wed Oct 28 04:32:19 2020 |
Seiya Nozaki | Timing diagram of SROUT/SRIN signal to write/read a write shift register | Dear Stefan,
OK, it's good to hear! Thank you! |
|
894
|
Mon Oct 17 16:29:37 2022 |
Sebastian Infante | DRS4 installation via tar in ubuntu not working | Hello i cant install any the last versions
that i downloaded from the dropbox, i can
untar the file called drs-5.0.6 and when |
|
693
|
Tue May 8 23:58:35 2018 |
Sean Quinn | Manual Rev5.1 Figure 1, optional components | Dear All,
I'm troubleshooting a board |
|