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Thu Jan 1 01:00:00 1970
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Tue Oct 12 03:53:37 2010, Jinhong Wang, Reference design for DRS4 active input buffer
Mon Jul 4 05:06:00 2011, Jinhong Wang, Fixed Patter Timing Jitter
Tue Jul 12 09:49:08 2011, Jinhong Wang, Fixed Patter Timing Jitter
Thu Dec 27 00:12:12 2012, Jinhong Wang, variation of sampling capacitors
Thu Dec 27 18:15:14 2012, Jinhong Wang, variation of sampling capacitors
Fri Feb 1 17:43:48 2013, Jinhong Wang, variation of sampling capacitors
Tue Jul 19 02:35:04 2022, Jingyu Zhang, Increase event rate, use ROI mode, and install sw from source in Mac
Tue Mar 28 21:53:12 2017, Jim Freeman, drscl doesn't find eval board but drsosc does (Windows 7)
Tue Mar 26 01:17:59 2013, Jill Russek, cascading -- DRS4 Osci.cpp & DRS.cpp
Fri Apr 5 02:21:33 2013, Jill Russek, cascading -- DRS4 Osci.cpp & DRS.cpp
Wed Apr 10 22:41:21 2013, Jill Russek, cascading -- DRS4 Osci.cpp & DRS.cpp
Thu Apr 11 23:32:57 2013, Jill Russek, cascading -- DRS4 Osci.cpp & DRS.cpp
Mon Sep 6 14:42:23 2021, Jiaolong, how to acquire the stop channel with 2x4096 cascading
Fri Nov 5 01:10:25 2021, Jiaolong, how to acquire the stop channel with 2x4096 cascading
Fri Nov 5 01:12:10 2021, Jiaolong, how to acquire the stop channel with 2x4096 cascading
Mon Oct 25 18:48:04 2021, Javier Caravaca, Trigger multiple boards independently
Tue Oct 26 23:18:32 2021, Javier Caravaca, Trigger multiple boards independently
Fri Jun 9 04:11:40 2023, Javier Caravaca, Different sampling rates in multi-board configuration
Tue Nov 16 01:27:51 2021, Jacquelynne Vaughan, V3 board, only one channel works, all components at each channel input working
Thu Sep 29 17:26:13 2016, Jacob Hwang, Output Timing Drifting
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