DRS4 Forum
  DRS4 Discussion Forum, Page 36 of 46  Not logged in ELOG logo
 Find |  Login |  Help 
 Full | Summary | Threaded | Collapse | Expand  Show only new entries   906 Entries 
Goto page Previous  1, 2, 3 ... 35, 36, 37 ... 44, 45, 46   Next  
+  Entry  Wed Aug 7 15:05:59 2013, Hermann-Josef Mathes, Repeated time calibration 
   +  Reply  Wed Aug 7 15:20:33 2013, Hermann-Josef Mathes, Repeated time calibration 
+  Entry  Wed Mar 5 21:54:13 2014, Hermann-Josef Mathes, Software drs-5.0.0 fails to compile (drsosc) drs-5.patch
+  Entry  Mon Mar 16 16:07:39 2015, Hermann-Josef Mathes, Running 2 instances of a DRS DAQ program 
+  Entry  Mon Apr 5 17:50:39 2010, Heejong Kim, version 1.2 evaluation board with firmware 13279? 
   +  Reply  Mon Apr 5 17:57:41 2010, Heejong Kim, Simple example application to read a DRS evaluation board 
+  Entry  Thu Jan 19 23:26:26 2012, Heejong Kim, drs_exam.cpp for evaluation board version 4 
   +  Reply  Fri Jan 20 23:50:39 2012, Heejong Kim, drs_exam.cpp for evaluation board version 4 
+  Entry  Sun Jan 31 23:52:15 2010, Hao Huan, Failure In Flashing Xilinx PROM 
+  Entry  Sat Feb 20 01:56:05 2010, Hao Huan, PLLLCK signal of DRS4 
   +  Reply  Sun Feb 21 00:46:01 2010, Hao Huan, PLLLCK signal of DRS4 
   +  Reply  Sun Feb 21 20:27:46 2010, Hao Huan, PLLLCK signal of DRS4 
   +  Reply  Mon Feb 22 17:23:59 2010, Hao Huan, PLLLCK signal of DRS4 
+  Entry  Wed Mar 3 17:36:31 2010, Hao Huan, Initialization of the Domino Circuit 
+  Entry  Thu Mar 4 19:14:10 2010, Hao Huan, Readout of DRS Data 
   +  Reply  Fri Mar 5 23:29:04 2010, Hao Huan, Readout of DRS Data 
+  Entry  Tue Mar 9 23:28:45 2010, Hao Huan, Serial Interface Frequency of the DRS Chip 
+  Entry  Thu Mar 11 21:37:32 2010, Hao Huan, Input Bandwidth of the DRS Chip 
   +  Reply  Thu Mar 18 21:38:10 2010, Hao Huan, Serial Interface Frequency of the DRS Chip 
+  Entry  Sun Mar 21 02:03:44 2010, Hao Huan, PLL Loop Filter Configuration 
Goto page Previous  1, 2, 3 ... 35, 36, 37 ... 44, 45, 46   Next  
ELOG V3.1.5-3fb85fa6