 Fri Sep 9 09:28:57 2011, Guillaume Blanchard, DRS4 and AD9222
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Thank you for your answers,
Another question : Have you ever tried to split the differential signal at the output of the DRS4 chip ? For
example to feed both an AD9222 and a diff. amplifier (followed by discriminators) ? |
 Mon Apr 23 10:38:51 2012, Guillaume Blanchard, DRS4 Initialization
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Hello,
I am writing a VHDL code to drive a DRS4 chip.
In order to configure the DRS4 chip, I have to set the "Config Register" and the "Write Shift Register" then ... (I do not |
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Thu Jun 18 17:33:05 2015, Gregor Kramberger, drs 5.03 and windows 8.1
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I have problems with driver installation on windows 8.1 (software version 5.03). I have sen that that has been an issue before (driver signing)
and I would like to know if this has been solved. We run several DRS4 evaluation boards on different PCs all running Win7 without any problems.
Therefore we are almost confident that it is related to Win 8.1. Thanks. |
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Fri Jun 19 12:32:10 2015, Gregor Kramberger, drs 5.03 and windows 8.1
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Gregor Kramberger wrote:
I have problems with driver |
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Fri Jan 13 12:58:22 2017, Gregor Kramberger, DRS software doesn't work under Windows XP SP3
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Hi all
I have a problem with running the DRSOSC under windows XP SP3. We have some hardware which is not supported under newer versions of windows and
we would like to use DRS boards along it, therefore we would higly appreciated any help in that direction. We have installed the software (V 5.03) to two |
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Mon Apr 10 08:50:11 2017, Giovanni Bruni, drs4 registers behaviour
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Hej everyone!
I have some questions regarding what happens to some DRS registers in some scenarios:
1. How are the registers affected by a RESET? According to the data sheet all the CONFIG REGISTER bits are initilialized to 1. But what about the |
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Mon Apr 10 13:41:41 2017, Giovanni Bruni, drs4 registers behaviour
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Hej Stefan! Thank you for your answer!
Just to be sure to have understood properly:
1. Using the RESET line should be avoided. And in any case, the CONFIG register and the WRITE SHIFT register need to be initialized "by hand" |
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Tue Apr 11 09:07:33 2017, Giovanni Bruni, drs4 registers behaviour
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Thank you Stefan for replying!
I have still the RESET issue in mind: how would you suggest to reset properly the DRS? Is there a particular procedure to follow instead of just
sending a negative pulse to the RESET pin? Is it preferable to turn the DRS off and then restart? |
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Fri Nov 18 16:38:42 2016, Gerard Montarou, LabView
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Hello,
Did you start to write some VI to interface DRS4board with labview ?
i also have in mind to do that.I am surprised that nobody alraedy did it since there is no answer toyour question |
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Sun Sep 23 02:22:46 2018, Gerard Arino-Estrada, Trigger OUT pulse width variable from 100 us up to 100 ms
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Hello Stefan,
I am using the DRS4 board connected to a Raspberry PI and through the drsosc application. I am interested on using the "Trigger OUT"
signal to do some extra data processing with NIM modules. According to the manual, for each hardware trigger a TTL pulse of 150 ns width should be send |
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Wed Sep 26 18:25:07 2018, Gerard Arino-Estrada, Trigger OUT pulse width variable from 100 us up to 100 ms
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Thank you very much for the answer, I really appreciate your help.
Thanks!
Gerard |
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Wed Sep 26 18:28:20 2018, Gerard Arino-Estrada, Trigger OUT pulse width variable from 100 us up to 100 ms
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Thank you very much for the answer, I really appreciate your help.
Thanks!
Gerard |
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Wed Feb 27 13:47:32 2013, Georg Winner, Chip Test - Cell Error
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When starting Chip Test in DRS Command Line Interface, I receive the following message:
Cell error on channel 1, cell 5: -154.4 mV instead 0 mV
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Mon Mar 25 11:12:53 2013, Georg Winner, Differences in Source Code
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I have noticed some differences in the source code between Windows (4.0.0) and Linux (4.0.1) Version.
drs_exam.cpp: In the windows version when setting the trigger there is no part "if (b->GetBoardType() == 8) {...} else {...}" like
in Linux version. So under Windows drs_exam does not start readout of DRS 4 Evalutation Board V4, because it does not get the trigger, under linux the |
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Thu Apr 9 11:46:33 2015, Felix Bachmair, DRSBoard::SetTriggerSource
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Hi
I have a question about the function SetTriggerSource in the class DRSBoard (DRS.h/DRS.cpp)
In the implementation there is the following comment: |
Sat May 23 11:03:20 2015, Felix Bachmair, Issue with Trigger rates below ~100Hz 
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Hi
We are working with the DRS 4 V5 version and we investigated an issue with the trigger at rates below ~120 Hz.
As long as we have a trigger rate of more than 125 Hz. everything seems to work fine and we are recording more or less all events. |
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Tue May 26 11:27:27 2015, Felix Bachmair, DRS4 firmware UCF constraints
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> > Hello, I'm using two DRS4 rev.5 boards for 8ch readout and triggering.
> >
> > I needed to modify the trigger logic and implement some tweaks in the firmware, and noticed that
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Fri Jun 5 13:15:35 2015, Felix Bachmair, DRS4 firmware UCF constraints
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Hi Stefan,
No we only use one evaluation board. We use the evaluation board as a part of our beam test setup. It includes a telescope based on the current PSI46V2.1
CMS Pixel chip and a trigger logic board for triggering the telescope and the evaluation board. This includes a
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Thu Jul 2 08:53:17 2015, Felix Bachmair, Issue with Trigger rates below ~100Hz
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Hi,
We did a further investigation of this problem:
We figured out that this issue seems to be related to the kernel. |
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Thu Jul 2 13:20:51 2015, Felix Bachmair, Creation of Object files
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HI,
We are using the DRS4 Board in the EUDAQ framework [1]. We wrote a a Producer based on the software of the evaluation board, which is using the
DRS class/header/src files. |